Hub Datasheet

76 Intel
®
E7505 Chipset MCH Datasheet
Register Description
3.5.33 LPTT—AGP Low Priority Transaction Time Register (D0:F0)
Address Offset: BDh
Default Value: 00h
Attribute: R/W
Size: 8 bits
LPTT is an 8-bit register similar in function to AMTT. This register is used to control the minimum
tenure on the AGP for low priority data transaction (both reads and writes) issued using PIPE# or
SB mechanisms.
The number of clocks programmed in the LPTT represents the guaranteed time slice (measured in
66 MHz clocks) allotted to the current low priority AGP transaction data transfer state. This does
not necessarily apply to a single transaction but it can span over multiple low-priority transactions
of the same type. After this time expires, the AGP arbiter may grant the bus to another agent if
there is a pending request. The LPTT does not apply in the case of high-priority request where
ownership is transferred directly to high-priority requesting queue. The default value of LPTT is
00h and disables this function. The LPTT value can be programmed with 8-clock granularity. For
example, if the LPTT is programmed to 10h, the selected value corresponds to the time period of
16 AGP (66 MHz) clocks. Set by BIOS.
Bits
Default,
Access
Description
7:3
00h
R/W
Low Priority Transaction Timer Count Value (LPTTC). The number of clocks
programmed in these bits represents the time slice (measured in eight 66 MHz clock
granularity) allotted to the current low priority AGP transaction data transfer state).
2:0 Reserved