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Electrical Specifications

80 Intel® Xeon® Product 2800/4800/8800 v2 Product Family

Datasheet Volume One, February 2014

Notes:

1. Refer to Table 6-19 for details on the R

(Buffer on Resistance) value for this signal.

6.3 Power-On Configuration (POC) Options

Several configuration options can be configured by hardware. The processor samples

its hardware configuration at reset, on the active-to-inactive transition of RESET_N, or

upon assertion of PWRGOOD (inactive-to-active transition). For specifics on these

options, please refer to Table 6-7.

The sampled information configures the processor for subsequent operation. These

configuration options cannot be changed except by another reset transition of the

latching signal (RESET_N or PWRGOOD).

Notes:

1. Output tri-state option enables Fault Resilient Booting (FRB), for FRB details see Section 6.4. The signal

used to latch PROCHOT_N for enabling FRB mode is RESET_N.

2. This signal is sampled at cold reset / PWRGOOD-reset and warm reset. This is setup before PWRGOOD

asserts and held after reset deasserts.

3. This signal is sampled at cold reset / PWRGOOD-reset. This is setup before powergood asserts and held

after reset deasserts.

6.4 Fault Resilient Booting (FRB)

The Intel® Xeon® E7 v2 processor supports both socket and core level Fault Resilient

Booting (FRB), which provides the ability to boot the system as long as there is one

processor functional in the system. One limitation to socket level FRB is that the system

cannot boot if the legacy socket that connects to an active PCH becomes unavailable

SVID_IDLE_N PU VTT 1k-6k Ohms 1

TCK PD 1k-6k Ohms 1

TDI PU VTT 1k-6k Ohms 1

TRST_N PU VTT 1k-6k Ohms 1

TMS PU VTT 1k-6k Ohms 1

TXT_AGENT PD 1k-6k Ohms 1

TXT_PLTEN PU VTT 1K-6K Ohms 1

Table 6-6. Signals with On-Die Termination (Sheet 2 of 2)

Signal Name

Pull Up /Pull

Down

Rail Value Units Notes

Table 6-7. Power-On Configuration Option Lands

Configuration Option Land Name Notes

Output tri state PROCHOT_N 1

Execute BIST (Built-In Self Test) BIST_ENABLE 2

Enable Service Processor Boot Mode BMCINIT 3

Enable Intel® Trusted Execution Technology (Intel®

TXT) Platform

TXT_PLTEN 3

Power-up Sequence Halt for ITP configuration EAR_N 3

Enable Bootable Firmware Agent FRMAGENT 3

Enable Intel Trusted Execution Technology

(Intel TXT) Agent

TXT_AGENT 3

Used in conjunction with FRMAGENT EX_LEGACY_SKT

Configure Socket ID SOCKET_ID[1:0] 3