Hub Datasheet

146 Intel
®
E7505 Chipset MCH Datasheet
System Address Map
These address ranges are always mapped to system memory, regardless of the system
configuration. Memory may be allocated from the main memory segment (0_0100_0000h to
TOLM) for use by System Management Mode (SMM) hardware and software. The top of main
memory is defined by the Top of Low Memory (TOLM) register. Note that the address of the
highest 64-MB (dual channel) quantity of valid memory in the system is placed into the DRB7
register (32 MB for single channel). For systems with a total DRAM space and PCI memory-
mapped space of less than 4 GB, this value will be the same as the one programmed into the TOLM
register. For other memory configurations, the two are unlikely to be the same, since the PCI
configuration portion of the BIOS software will program the TOLM register to the maximum value
that is less than 4 GB and also allows enough room for all populated PCI devices. The MCH does
not allow AGP memory or the aperture above 4 GB. Figure 4-2 shows the memory segments below
1MB. Figure 4-3 shows the memory segments in the extended memory range (1 MB to 4 GB).
Figure 4-2. Detailed Memory Address Map (Below 1 MB)
Monochrome Display
Adapter Space
Upper, Lower,
Expansion Card BIOS
and Buffer Area
1 MB
640 KB
704 KB
736 KB
768 KB
0A0000h
0B0000h
0B8000h
0C0000h
Standard PCI/ISA
Video Memory
(SMM Memory)
Controlled by
PAM[6:0]
Controlled by
VGA Enable and
MDA Enable
= Optional System Memory
= System Memory