Vol 2

Intel® Xeon® Processor E7-2800/4800/8800 v2 Product Family 3
Datasheet Volume Two: Functional Description, February 2014
Contents
1Overview................................................................................................................. 17
1.1 Introduction .....................................................................................................17
1.2 Terminology .....................................................................................................18
1.3 Related Documents ...........................................................................................21
1.4 State of Data....................................................................................................22
2 The Processor Architecture Overview ......................................................................23
2.1 Core Features 2 ................................................................................................23
2.1.1 Frequency.............................................................................................24
2.1.2 Caching Hierarchy ..................................................................................24
2.1.3 Addressing Space...................................................................................24
2.1.4 Multi-threaded Cores ..............................................................................24
2.1.5 Power Management ................................................................................24
2.1.6 Intel
®
Technologies................................................................................24
2.2 Uncore Features................................................................................................ 25
2.2.1 The Ring ...............................................................................................25
2.2.2 Last Level Cache (LLC)............................................................................25
2.2.3 Caching Agent (Cbo)...............................................................................25
2.2.4 Intel
®
QuickPath Interconnect (Intel
®
QPI)................................................25
2.2.5 Home Agent (HA)...................................................................................26
2.2.6 Integrated Memory Controller (iMC)..........................................................27
2.2.7 Power Control Unit (PCU) ........................................................................27
2.2.8 Integrated I/O module (IIO)....................................................................27
2.2.9 Config Agent (Ubox)...............................................................................28
2.2.10 Performance Monitor (PerfMon)................................................................28
3 Cbo Functional Description ......................................................................................29
3.1 Basic Flows.......................................................................................................29
3.1.1 Handling Core/IIO Request......................................................................29
3.2 Source Address Decoder.....................................................................................30
3.2.1 System Address Spaces ..........................................................................30
3.2.2 Uncore SAD Relationship to Other Address Decoders................................... 30
3.2.3 SAD Address Spaces...............................................................................31
3.2.4 DRAM/MMIO Decoders ............................................................................32
3.2.5 Legacy Decoder .....................................................................................32
3.2.6 TSEG Range (CSR_TSEG <= addr) ...........................................................33
3.2.7 Configuration Address Space....................................................................33
3.2.8 NO_EGO Range......................................................................................33
3.2.9 I/O Address Space..................................................................................33
3.2.10 SAD Glossary.........................................................................................33
3.3 Viral Support ....................................................................................................34
4 Home Agent Functional Description.........................................................................35
4.1 Home Agent Architecture Overview......................................................................35
4.1.1 Ring Interface for Home Agent.................................................................35
4.1.2 Backup Tracker and Home Tracker ...........................................................35
4.1.3 Intel QPI Home Logic..............................................................................36
4.1.4 Home Agent Data Buffer (HADB)..............................................................36
4.1.5 Memory Controller Interface ....................................................................36
4.2 Directory Support..............................................................................................36
4.3 RTID Allocation.................................................................................................36
4.4 Backup Tracker (BT).......................................................................................... 36
4.4.1 Backup Tracker Mode..............................................................................36
4.5 NodeID Conventions..........................................................................................36