Vol 1

PIROM

178 Intel® Xeon® Product 2800/4800/8800 v2 Product Family

Datasheet Volume One, February 2014

Example: The Intel® Xeon® E7 v2 processor supports a maximum PCIe link transfer

rate of 8.0 GT/s. Therefore, offset 2Ah-2Bh has a value of 8000.

9.3.4.3 QPIVN: Intel QPI Version Number

The Intel QPI Version Number is provided as four 8-bit ASCII characters. Writes to this

Example: The Intel® Xeon® E7 v2 processor supports Intel QPI Version Number 1.1.

Therefore, offset 2Eh-31h has an ASCII value of “01.1”, which is 30, 31, 2E, 31.

9.3.4.4 TXT: TXT

This location contains the Intel TXT location, which is a two-bit field and is LSB aligned.

A value of 00b indicates Intel TXT is not supported. A value of 01b indicates Intel TXT is

supported. Writes to this register have no effect.

Example: A processor supporting Intel TXT will have offset 32h set to 01h.

9.3.4.5 MAXSMP: Maximum Intel SMI2 Performance Transfer Rate

Systems may need to read this offset to decide on compatible processors and Intel

C102/C104 Scalable Memory Buffer capabilities. The data provided is the transfer rate,

rounded to a whole number, and reflected in binary coded decimal. Writes to this

Offset: 2Ch-2Dh

Bit Description

15:0 Minimum Intel QPI Transfer Rate

0000h-FFFFh: MHz

Offset: 2Eh-31h

Bit Description

31:0 Intel QPI Version Number

00000000h-FFFFFFFFh: MHz

Offset: 32h

Bit Description

7:2 RESERVED

000000b-111111b: Reserved

1:0 TXT

TXT support indicator

00b: Not supported

01b: Supported

10b-11b: Reserved