Datasheet

DRAM Controller Registers (D0:F0)
134 Datasheet
5.2.46 TSS—Thermal Sensor Status
B/D/F/Type: 0/0/0/MCHBAR
Address Offset: CDAh
Default Value: 00h
Access: RO
Size: 8 bits
This read only register provides trip point and other status of the thermal sensor.
All bits in this register are reset to their defaults by MPWROK.
Bit Access
Default
Value
Description
7RO0b
Catastrophic Trip Indicator (CTI): A 1 indicates that the internal thermal
sensor temperature is above the catastrophic setting.
6RO0b
Hot Trip Indicator (HTI): A 1 indicates that the internal thermal sensor
temperature is above the Hot setting.
5RO0b
Aux0 Trip Indicator (A0TI): A 1 indicates that the internal thermal sensor
temperature is above the Aux0 setting.
4RO0b
Thermometer Mode Output Valid (TOV): A 1 indicates the Thermometer
mode is able to converge to a temperature and that the TR register is reporting a
reasonable estimate of the thermal sensor temperature. A 0 indicates the
Thermometer mode is off, or that temperature is out of range, or that the TR
register is being looked at before a temperature conversion has had time to
complete.
3:2 RO 00b Reserved
1RO0b
Direct Catastrophic Comparator Read (DCCR): This bit reads the output of
the Catastrophic comparator directly, without latching via the Thermometer
mode circuit. Used for testing.
0RO0b
Direct Hot Comparator Read (DHCR): This bit reads the output of the Hot
comparator directly, without latching via the Thermometer mode circuit. Used
for testing.