Computer Hardware User Manual
Table Of Contents
- 1.0 General Description
- 2.0 Introduction
- 3.0 Quick-Start Checklist
- 4.0 Optional Configurations
- 5.0 LEDs
- 6.0 Board Schematics
- Figure 4. LXD9785 PQFP MII Demo Board Power (Fiber Board Revision A2)
- Figure 5. Control
- Figure 6. MII Ports 0 and 1
- Figure 7. MII Ports 2 and 3
- Figure 8. MII Ports 4 and 5
- Figure 9. MII Ports 6 and 7
- Figure 10. Fiber Ports 0 and 1
- Figure 11. Fiber Ports 2 and 3
- Figure 12. Fiber Ports 4 and 5
- Figure 13. Fiber Ports 6 and 7
- Figure 14. Caps
- Figure 15. SS-SMII to MII ALTERA
- Figure 16. Clock Distribution
- Figure 17. Inter-Frame Status LEDs
- Figure 18. Logic Analyzer
- Figure 19. MDIO0 and MDC0 Fix
- Figure 20. MDIO1 and MDC1 Fix
- 7.0 Bill of Materials
LXD9785 PQFP Demo Board with FPGA for SS-SMII (Fiber)-to-MII Conversion
Development Kit Manual 25
Document #: 249323
Revision #: 003
Rev. Date: January 24, 2002
Figure 10. Fiber Ports 0 and 1
A
A
B
B
C
C
D
D
E
E
4 4
3 3
2 2
1 1
FIBER PORTS 0&1 A2
LXD9785 SS/SMII MII FX DV BOARD
B
818Wednesday, February 21, 2001
Title
Size Document Number Rev
Date: Sheet
of
SD0
SD1
TPFON0
TPFOP0
TPFIN0
TPFIP0
TPFIP1
TPFIN1
TPFOP1
TPFON1
TPFON0
TPFOP0
TPFIP1
TPFIN1
TPFOP1
SD0
SD1
TPFIN0
TPFIP0
TPFON1
TPFOP04
TPFON04
TPFIN0 4
TPFIP0 4
TPFIN1 4
TPFIP1 4
TPFON14
TPFOP14
SD14
SD04
GND
GNDGND
GND
GND GND
GND
GND
GND
GND
GND
GND
GND
GND
VCC_FX
VCC_FX
VCC_FX
VCC_FX
TP199
1
+
C282
10uF
TP196
1
+
C286
0.1uF
TP197
1
L3
1uH
+
C285
0.1uF
L4
1uH
R663
50 1%
R664
50 1%
+
C283
0.1uF
+
C281
0.1uF
R666
130
L2
1uH
R658
82
R667
82
R660
130
L1
1uH
TP184
1
+
C280
0.1uF
TP185
1
+
C279
0.1uF
R650
27
R655
50 1%
R659
27
R654
50 1%
TP194
1
+
C276
10uF
TP195
1
+
C277
0.1uF
TP192
1
FIBER PORT
F1
HFBR_5903
6
7
8
9
10
5
4
3
2
1
TX Vcc
TX Gnd
N/C
TD
TD
RD
RD
SD
RX Vcc
RX Gnd
TP193
1
FIBER PORT
F2
HFBR_5903
6
7
8
9
10
5
4
3
2
1
TX Vcc
TX Gnd
N/C
TD
TD
RD
RD
SD
RX Vcc
RX Gnd
R657
130
R665
130
R651
130
R656
130
TP198
1
+
C287
0.1uF