Specifications
Intel
®
Solid-State Drive DC P3700 Series
July 2014 Product Specification
330566-002US 21
Pin
Name
Description
Pin
Name
Description
P1
Not used (SATAe/SAS)
S11
GND
Ground
P2
Not used (SATAe/SAS)
S12
Not used (SATAe/SAS)
P3
Not used (SATAe)
S13
Not used (SATAe/SAS)
P4
IfDet_N
Interface detect (drive type)
S14
GND
Ground
P5
GND
Ground
S15
RSVD
Reserved
P6
GND
Ground
S16
GND
Ground
P7
Not used (SATA/SAS)
S17
PETp1
Transmitter differential pair, Lane 1
P8
Not used (SATA/SAS)
S18
PETn1
Transmitter differential pair, Lane 1
P9
Not used (SATA/SAS)
S19
GND
Ground
P10
PRSNT_N
Presence detect (also used for
drive type)
S20
PERn1
Receiver differential pair, Lane 1
P11
Activity
Activity signal from the drive
S21
PERp1
Receiver differential pair, Lane 1
P12
Hot-Plug
Ground
S22
GND
Ground
P13
+12V_pre
12V power
S23
PETp2
Transmitter differential pair, Lane 2
P14
+12V
12V power
S24
PETn2
Transmitter differential pair, Lane 2
P15
+12V
12V power
S25
GND
Ground
S26
PERn2
Receiver differential pair, Lane 2
S27
PERp2
Receiver differential pair, Lane 2
S28
GND
Ground
E17
PETp3
Transmitter differential pair, Lane 3
E18
PETn3
Transmitter differential pair, Lane 3
E19
GND
Ground
E20
PERn3
Receiver differential pair, Lane 3
E21
PERp3
Receiver differential pair, Lane 3
E22
GND
Ground
E23
SMCLK
SMBus clock
E24
SMDAT
SMBus data
E25
DualPortEn_N
Dual port enable
NOTES:
SMCLK and SMDAT routes to an internal EEPROM which contains Vital Product Data (VPD).
PRSNT_N is kept open by the P3700 Series.
IfDet_N is grounded by P3700 Series.
DualPortEn_N pin should be left un-connected or un-driven by the system to enable single port operation
with all 4 lanes. If un-connected, P3700 Series will pull it high. However, if the pin is asserted by the
system (driven low by storage backplane), then P3700 Series will be configured as x2 lanes.
P11 is used for activity. When idle, logic level is low (LED Solid On). During IO activity and formatting,
pin toggles 250msec high, 250msec low signal.
P3700 Series only uses REFCLK0+ and REFCLK0- as reference clock pair.
P3700 Series only uses PERST0# as a fundamental reset.
3.3Vaux is only needed during SMBUS access to the VPDROM.