Datasheet

Intel
®
Server Board S2400GP TPS Functional Architecture
Revision 1.01
Intel order number G50295-002
33
3.7 Processor Integrated I/O Module (IIO)
The processor’s integrated I/O module provides features traditionally supported through chipset
components. The integrated I/O module provides the following features:
 PCI Express* Interfaces: The integrated I/O module incorporates the PCI Express*
interface and supports up to 24 lanes of PCI Express*. Following are key attributes of
the PCI Express* interface:
o Gen3 speeds at 8 GT/s (no 8b/10b encoding)
- The Intel
®
Server Board S2400GP supports PCIe slots from two
processors:
o From the first processor:
- Slot 2: PCIe Gen3 x4 electrical with x8 physical connector
- Slot 6: PCIe Gen3 x16 electrical with x16 physical connector
o From the second processor:
- Slot 3: PCIe Gen3 x16 electrical with x16 physical connector
- Slot 4: PCIe Gen3 x8 electrical with x8 physical connector
- Slot 5: PCIe Gen3 x4 electrical with x8 physical connector
 DMI2 Interface to the PCH: The platform requires an interface to the legacy
Southbridge (PCH) which provides basic, legacy functions required for the server
platform and operating systems. Since only one PCH is required and allowed for the
system, any sockets which do not connect to PCH would use this port as a standard x4
PCI Express* 2.0 interface.
 Integrated IOAPIC: Provides support for PCI Express* devices implementing legacy
interrupt messages without interrupt sharing.
 Non Transparent Bridge: PCI Express* non-transparent bridge (NTB) acts as a
gateway that enables high performance, low overhead communication between two
intelligent subsystems; the local and the remote subsystems. The NTB allows a local
processor to independently configure and control the local subsystem, provides isolation
of the local host memory domain from the remote host memory domain while enabling
status and data exchange between the two domains.
 Intel
®
QuickData Technology: Used for efficient, high bandwidth data movement
between two locations in memory or from memory to I/O.