Datasheet
Datasheet, Volume 1 7
Figures
1-1 Mobile Processor Platform........................................................................................ 10
1-2 Mobile Processor Compatibility Diagram .................................................................... 18
2-1 Intel
®
Flex Memory Technology Operation ................................................................. 26
2-2 PCI Express* Layering Diagram................................................................................ 28
2-3 Packet Flow Through the Layers ............................................................................... 29
2-4 PCI Express* Related Register Structures in the Processor ........................................... 30
2-5 PCI Express* Typical Operation 16 Lanes Mapping ...................................................... 31
2-6 Processor Graphics Controller Unit Block Diagram ....................................................... 33
2-7 Processor Display Block Diagram .............................................................................. 36
4-1 Processor Power States ...........................................................................................49
4-2 Idle Power Management Breakdown of the Processor Cores ......................................... 53
4-3 Thread and Core C-State Entry and Exit .................................................................... 53
4-4 Package C-State Entry and Exit ................................................................................ 57
5-1 Package Power Control............................................................................................ 69
5-2 Frequency and Voltage Ordering............................................................................... 77
7-1 Example for PECI Host-Clients Connection ............................................................... 108
7-2 Input Device Hysteresis ........................................................................................ 109
8-1 rPGA988B (Socket-G2) Pin Map.............................................................................. 111
8-2 BGA1224 Ballmap (left side) .................................................................................. 123
8-3 BGA1224 Ballmap (right side) ................................................................................ 124
8-4 BGA1023 Ballmap (left side) .................................................................................. 142
8-5 BGA1023 Ballmap (right side) ................................................................................ 143
8-6 Processor rPGA988B 2C/GT1 (G24406) Mechanical Package (Sheet 1 of 2) .................. 158
8-7 Processor rPGA988B 2C/GT1 (G24406) Mechanical Package (Sheet 2 of 2) .................. 159
8-8 Processor rPGA988B 2C/GT2 (G23867) Mechanical Package (Sheet 1 of 2) .................. 160
8-9 Processor rPGA988B 2C/GT2 (G23867) Mechanical Package (Sheet 2 of 2) .................. 161
8-10 Processor rPGA988B 4C/GT2 (E95127) Mechanical Package (Sheet 1 of 2) ................... 162
8-11 Processor rPGA988B 4C/GT2 (E95127) Mechanical Package (Sheet 2 of 2) ................... 163
8-12 Processor BGA1023 2C/GT1 (G24405) Mechanical Package ........................................ 164
8-13 Processor BGA1023 2C/GT2 (G23866) Mechanical Package ........................................ 165
8-14 Processor BGA1224 4C/GT2 (G26204) Mechanical Package ........................................ 166
Tables
1-1 Mobile 3rd Generation Intel
®
Core™ Processor Family, Mobile Intel
®
Pentium
®
Processor Family, and Mobile Intel
®
Celeron
®
Processor Family SKUs ........................... 16
1-2 Terminology .......................................................................................................... 19
1-3 Related Documents ................................................................................................ 22
2-1 Processor Mobile DIMM Support Summary by Product ................................................. 23
2-2 Supported DDR3 / DDR3L / DDR3L-RS SO-DIMM Module Configurations ....................... 24
2-3 Supported Maximum Memory Size Per DIMM.............................................................. 24
2-4 DDR3 / DDR3L / DDR3L-RS at 1.5 V System Memory Timing Support............................ 25
2-5 DDR3L / DDR3L-RS System Memory Timing Support................................................... 25
2-6 Reference Clock ..................................................................................................... 38
4-1 System States ....................................................................................................... 50
4-2 Processor Core / Package State Support .................................................................... 50
4-3 Integrated Memory Controller States ........................................................................ 50
4-4 PCI Express* Link States......................................................................................... 51
4-5 Direct Media Interface (DMI) States .......................................................................... 51
4-6 Processor Graphics Controller States......................................................................... 51
4-7 G, S, and C State Combinations ............................................................................... 51
4-8 D, S, and C State Combination................................................................................. 52
4-9 Coordination of Thread Power States at the Core Level ................................................ 54