Datasheet
Datasheet, Volume 1 101
Electrical Specifications
Notes:
1. Refer to Chapter 6 for signal description details.
2. SA and SB refer to DDR3 Channel A and DDR3 Channel B.
3. These signals only apply to BGA packages.
4. The maximum Rise/Fall time of UNCOREPWRGOOD is 20 ns.
Note: All Control Sideband Asynchronous signals are required to be asserted / deasserted for
at least 10 BCLKs with a maximum T
rise
/T
fall
of 6 ns in order for the processor to
recognize the proper signal state. See
Section 7.9 for the DC specifications.
Single Ended
Asynchronous Bi-
directional
PECI
Single Ended
CMOS Input
Open Drain Output
Bi-directional
VIDALERT #
VIDSCLK
VIDSOUT
Voltage Regulator
Single Ended CMOS Input VIDALERT#
Single Ended CMOS Output VCCSA_VID[1:0]
Single Ended Open Drain Output VIDSCLK
Single Ended
Bi-directional CMOS
Input/Open Drain Output
VIDSOUT
Single Ended Analog Output VCCSA_SENSE
Differential Analog Output
VCC_SENSE, VSS_SENSE
VCCIO_SENSE, VSS_SENSE_VCCIO
VAXG_SENSE, VSSAXG_SENSE
VCC_VAL_SENSE, VSS_VAL_SENSE
VAXG_VAL_SENSE, VSSAXG_VAL_SENSE
Power / Ground / Other
Single Ended
Power
VCC, VCCIO, VCCSA, VCCPLL, VDDQ, VAXG,
VCCPQE
3
,
VCCDQ
3
Ground VSS, VSS_NCTF
3
,
DC_TEST_xx#
No Connect RSVD, RSVD_NCTF
Test Point RSVD_TP
Other SKTOCC#, PROC_DETECT#
3
PCI Express* Graphics
Differential PCI Express Input PEG_RX[15:0], PEG_RX#[15:0]
Differential PCI Express Output PEG_TX[15:0], PEG_TX#[15:0]
Single Ended Analog Input PEG_ICOMPO, PEG_ICOMPI, PEG_RCOMPO
Embedded DisplayPort* (eDP)
Differential eDP Output eDP_TX[3:0], eDP_TX#[3:0]
Differential eDP Bi-directional eDP_AUX, eDP_AUX#
Single Ended
Asynchronous CMOS
Input
eDP_HPD#
Single Ended Analog Input eDP_ICOMPO, eDP_COMPIO
DMI
Differential DMI Input DMI_RX[3:0], DMI_RX#[3:0]
Differential DMI Output DMI_TX[3:0], DMI_TX#[3:0]
Intel
®
FDI
Single Ended CMOS Input
FDI0_FSYNC, FDI1_FSYNC, FDI0_LSYNC,
FDI1_LSYNC
Single Ended
Asynchronous CMOS
Input
FDI_INT
Differential FDI Output
FDI0_TX[3:0], FDI0_TX#[3:0], FDI1_TX[3:0],
FDI1_TX#[3:0]
Table 7-3. Signal Groups
1
(Sheet 2 of 2)
Signal Group Type Signals