Datasheet

Graphics, Video, and Display
Intel
®
Atom™ Processor E6xx Series Datasheet
90
7.7 Configuration Registers
7.7.1 D2:F0 PCI Configuration Registers
Table 76. PCI Header for D2
Offset Register Description
00h GVD.ID D2: PCI Device and Vendor ID Register
04h GVD.PCICMDSTS PCI Command and Status Register
08h GVD.RIDCC Revision Identification and Class Codes
0Ch GVD.HDR Header Type
10h GVD.MMADR
Memory Mapped Address Range. This is the base address for all
memory mapped registers.
14h GVD.GFX_IOBAR
I/O Base Address. This is used only by SBIOS and is the base address
for the MMIO_INDEX and MMIO_DATA registers.
18h GVD.GMADR Graphics Memory Address Range
1Ch GVD.GTTADR Graphics Translation Table Address Range
2Ch GVD.SSID Subsystem Identifiers
34h GVD.CAPPOINT Capabilities Pointer
3Ch GVD.INTR
Interrupt. This register is programmed by SBIOS. It is not used by the
graphics/display driver.
50h GVD.MGGC Graphics Control
5Ch GVD.BSM Base of Stolen Memory
60h GVD.MSAC Multi Size Aperture Control
90h GVD.MSI_CAPID Message Signaled Interrupts Capability ID and Control Register
94h GVD.MA Message Address
98h GVD.MD Message Data
B0h GVD.VCID Vendor Capability ID
B4h GVD.VC Vendor Capabilities
C4h GVD.FD Functional Disable. This register is used by SBIOS, not by driver.
D0h GVD.PMCAP Power Management Capabilities
D4h GVD.PMCS
Power Management Control/Status. Driver does not use this register.
SBIOS doesn’t use this register.
E0h GVD.SWSMISCI Software SMI or SCI
E4h GVD.ASLE
System Display Event Register. SBIOS writes this register to generate
an interrupt to the graphics/display driver.
F4h GVD.LBB
Legacy Backlight Brightness. The display driver in the processor does
not use this register since ASLE is available.
F8h
GVD.MANUFACTURI
NG_ID
Manufacturing ID
FCh GVD.ASLS ASL
Storage. The processor display driver does not need this register since
memory Operational Region (OpRegion) is available. This register is
kept for use as scratch space.