Datasheet

Graphics, Video, and Display

Intel

Atom™ Processor E6xx Series Datasheet

Note: The Intel

Atom™ Processor E6xx Series has limited support for a VGA Plane. The VGA

plane is suitable for usages, such as BIOS boot screens, pre-OS splash screens, etc.

Other usages of the VGA plane (like DOS-based games, for example) are not

supported.

7.5.1.2 Display Pipes

The display consists of two pipes:

• Display Pipe A

• Display Pipe B

A pipe consists of a set of combined planes and a timing generator. The timing

generators provide timing information for each of the display pipes. The Intel

Atom™

Processor E6xx Series has two independent display pipes that can allow for support of

two independent display streams. A port is the destination for the result of the pipe.

Pipe A can operate in a single-wide mode.

The Clock Generator Units (DPLLA) provides a stable frequency for driving display

devices. It operates by converting an input reference frequency into an output

frequency. The timing generators take their input from internal DPLL devices that are

programmable to generate pixel clocks to a maximum pixel clock rate up to 80 MHz for

LVDS and 160 MHz for SDVO.

Note: Unused display PLLs can be disabled to save power.

7.5.2 Display Ports

Display ports are the destination for the display pipe. These are the places where the

display data finally appears to devices outside the graphics device. The Intel

Atom™

Processor E6xx Series has one dedicated LVDS and one SDVO port.

Since two display ports available for its two pipes, the processor can support up to two

different images on two different display devices. Timings and resolutions for these two

images may be different.