Datasheet

Graphics, Video, and Display

Intel

Atom™ Processor E6xx Series Datasheet

• Supports NV12 data format

• 3x3 Panel Fitter shared by two pipes

• Support Constant Alpha mode on Display C/Video sprite plane

•DPST 3.0

The display contains the following functions:

• Display data fetching

• Out of order display data handling

• Display blending

• Gamma correction

• Panel fitter function

7.5.1 Display Output Stages

The display output can be divided into three stages:

•Planes

— Request/Receive data from memory

— Format memory data into pixels

— Handle fragmentation, tiling, physical address mapping

•Pipes

— Generate display timing

—Scaling, LUT

• Ports

— Format pixels for output (LVDS or SDVO)

— Interface to physical layer

7.5.1.1 Planes

The Display Controller contains a variety of planes (such as Display and Cursor). A

plane consists of a rectangular shaped image that has characteristics (such as source,

size, position, method, and format). These planes get attached to source surfaces,

which are rectangular areas in memory with a similar set of characteristics. They are

also associated with a particular destination pipe.

• Display Plane—The primary and secondary display plane works in an indexed

mode, hi-color mode, or a true color mode. The true color mode allows for an 8-bit

alpha channel. One of the primary operations of the display plane is the set mode

operation. The set-mode operation occurs when it is desired to enable a display,

change the display timing, or source format. The secondary display plane can be

used as a primary surface on the secondary display or as a sprite planes on either

the primary or secondary display.

• Cursor Plane—The cursor plane is one of the simplest display planes. With a few

exceptions, the cursor plane supports sizes of 64 x 64, 128 x 128 and 256 x 256

fixed Z-order (top). In legacy modes, cursor can cause the display data below it to

be inverted.

• VGA Plane—VGA mode provides compatibility for pre-existing software that set

the display mode using the VGA CRTC registers. VGA Timings are generated based

on the VGA register values (the hi-resolution timing generator registers are not

used).