Datasheet
Contents
Intel
®
Atom™ Processor E6xx Series Datasheet
8
9.3.1.28 Offset 72h: PCIECAP – PCI Express* Capabilities Register.............151
9.3.1.29 Offset 74h: DEVCAP – Device Capabilities Register.......................151
9.3.1.30 Offset 78h: DEVC – Device Control ............................................151
9.3.1.31 Offset 7Ah: DEVS – Device Status Register.................................152
9.3.1.32 Offset FCh – FD: Function Disable Register .................................152
9.3.1.33 Offset 100h: VCCAP – Virtual Channel Enhanced Capability Header 153
9.3.1.34 Offset 104h: PVCCAP1 – Port VC Capability Register 1..................153
9.3.1.35 Offset 108h: PVCCAP2 – Port VC Capability Register 2..................154
9.3.1.36 Offset 10Ch: PVCCTL – Port VC Control Register..........................154
9.3.1.37 Offset 10Eh: PVCSTS – Port VC Status Register...........................154
9.3.1.38 Offset 110h: VC0CAP – VC0 Resource Capability Register .............154
9.3.1.39 Offset 114h: VC0CTL – VC0 Resource Control Register .................155
9.3.1.40 Offset 11Ah: VC0STS – VC0 Resource Status Register..................155
9.3.1.41 Offset 11Ch: VC1CAP – VC1 Resource Capability Register .............155
9.3.1.42 Offset 120h: VC1CTL – VC1 Resource Control Register .................155
9.3.1.43 Offset 126h: VC1STS – VC1 Resource Status Register..................156
9.3.1.44 Offset 130h: RCCAP – Root Complex Link Declaration Enhanced
Capability Header Register........................................................156
9.3.1.45 Offset 134h: ESD – Element Self Description Register ..................156
9.3.1.46 Offset 140h: L1DESC – Link 1 Description Register ......................157
9.3.1.47 Offset 148h: L1ADD – Link 1 Address Register ............................157
9.3.2 Memory Mapped Configuration Registers..................................................157
9.3.2.1 Intel
®
HD Audio
β
Registers.......................................................157
10.0 LPC Interface (D31:F0) ..........................................................................................187
10.1 Functional Overview.........................................................................................187
10.1.1 Memory Cycle Notes .............................................................................187
10.1.2 Intel
®
Trusted Platform Module
ε
1.2 Support............................................187
10.1.3 FWH Cycle Notes ..................................................................................187
10.1.4 LPC Output Clocks ................................................................................187
10.2 PCI Configuration Registers...............................................................................188
10.2.1 ID—Identifiers......................................................................................188
10.2.2 CMD—Device Command Register ............................................................189
10.2.3 STS—Device Status Register ..................................................................189
10.2.4 RID—Revision ID Register......................................................................189
10.2.5 CC—Class Code Register........................................................................190
10.2.6 HDTYPE—Header Type Register ..............................................................190
10.2.7 SS—Subsystem Identifiers Register.........................................................190
10.3 ACPI Device Configuration ................................................................................191
10.3.1 SMBA—SMBus Base Address Register......................................................191
10.3.2 GBA—GPIO Base Address Register ..........................................................191
10.3.3 PM1BLK—PM1_BLK Base Address Register ...............................................191
10.3.4 GPE0BLK—GPE0_BLK Base Address Register ............................................192
10.3.5 LPCS—LPC Clock Strength Control Register ..............................................192
10.3.6 ACTL—ACPI Control Register ..................................................................193
10.3.7 MC - Miscellaneous Control Register ........................................................193
10.4 Interrupt Control .............................................................................................195
10.4.1 PxRC—PIRQx Routing Control Register.....................................................195
10.4.2 SCNT—Serial IRQ Control Register ..........................................................196
10.4.3 WDTBA-WDT Base Address ....................................................................196
10.5 FWH Configuration Registers .............................................................................196
10.5.1 FS—FWH ID Select Register ...................................................................196
10.5.2 BDE—BIOS Decode Enable.....................................................................197
10.5.3 BC—BIOS Control Register.....................................................................198
10.6 Root Complex Register Block Configuration .........................................................199
10.6.1 RCBA—Root Complex Base Address Register ............................................199