Datasheet

Register and Memory Mapping
Intel
®
Atom™ Processor E6xx Series Datasheet
66
5.5.3.5 Offset 314Eh: D24IR – Device 24 Interrupt Route
5.5.3.6 Offset 3150h: D23IR – Device 23 Interrupt Route
5.5.3.7 Offset 3160h: D02IR – Device 2 Interrupt Route
Table 61. 314Eh: D24IR – Device 24 Interrupt Route
Size: 16 bit Default: Power Well:
Memory Mapped IO BAR: RCBA Offset: 314Eh
Bit Range Default Access Acronym Description
15 :12 3h RW IDR
Interrupt D Pin Route: Indicates which routing is used for INTD_B of
device 24
11 :08 2h RW ICR
Interrupt C Pin Route: Indicates which routing is used for INTC_B of
device 24
07 :04 1h RW IBR
Interrupt B Pin Route: Indicates which routing is used for INTB_B of
device 24
03 :00 0h RW IAR
Interrupt A Pin Route: Indicates which routing is used for INTA_B of
device 24
Table 62. 3150h: D23IR – Device 23 Interrupt Route
Size: 16 bit Default: Power Well:
Memory Mapped IO BAR: RCBA Offset: 3150h
Bit Range Default Access Acronym Description
15 :12 3h RW IDR
Interrupt D Pin Route: Indicates which routing is used for INTD_B of
device 23
11 :08 2h RW ICR
Interrupt C Pin Route: Indicates which routing is used for INTC_B of
device 23
07 :04 1h RW IBR
Interrupt B Pin Route: Indicates which routing is used for INTB_B of
device 23
03 :00 0h RW IAR
Interrupt A Pin Route: Indicates which routing is used for INTA_B of
device 23
Table 63. 3160h: D02IR – Device 2 Interrupt Route
Size: 16 bit Default: Power Well:
Memory Mapped IO BAR: RCBA Offset: 3160h
Bit Range Default Access Acronym Description
15 :12 3h RW IDR
Interrupt D Pin Route: Indicates which routing is used for INTD_B of
device 2
11 :08 2h RW ICR
Interrupt C Pin Route: Indicates which routing is used for INTC_B of
device 2
07 :04 1h RW IBR
Interrupt B Pin Route: Indicates which routing is used for INTB_B of
device 2
03 :00 0h RW IAR
Interrupt A Pin Route: Indicates which routing is used for INTA_B of
device 2