Datasheet

Pin States
Intel
®
Atom™ Processor E6xx Series Datasheet
48
3.6 LPC Interface Signals
3.7 SMBus Interface Signals
3.8 SPI Interface Signals
3.9 Power Management Interface Signals
Table 25. LPC Interface Signals
Signal Name Direction Reset Post-Reset S3 S4/S5
LPC_AD[3:0] I/O High-Z High-Z Off Off
LPC_FRAME_B O VOH VOH Off Off
LPC_SERIRQ I/O High-Z High-Z Off Off
LPC_CLKRUN_B I/O VOL VOL Off Off
LPC_CLKOUT[2:0] O VOH VOH Off Off
Table 26. SMBus Interface Signals
Signal Name Direction Reset Post-Reset S3 S4/S5
SMB_DATA I/O High-Z High-Z Off Off
SMB_CLK I/O High-Z High-Z Off Off
SMB_ALERT_B I High-Z High-Z Off Off
Table 27. SPI Interface Signals
Signal Name Direction Reset Post-Reset S3 S4/S5
SPI_MOSI O VOH VOH Off Off
SPI_MISO I VIH VIH Off Off
SPI_CS_B I/O VOH VOH Off Off
SPI_SCK O VOL VOL Off Off
Table 28. Power Management Interface Signals (Sheet 1 of 2)
Signal Name Direction Reset Post-Reset S3 S4/S5
RESET_B I VIH VIH VIL Off
PWROK I VIX-unknown VIH VIL VIL
RSMRST_B I VIX-unknown VIH VIH VIL
RTCRST_B I VIX-unknown VIH VIH VIH
SUSCLK O Running Running Running Off
WAKE_B I VIX-unknown VIX-unknown VIX-unknown Off
SLPMODE O VOL VOL VOL Off
RSTWARN I VIH VIH VIH Off