Datasheet

ACPI Devices
Intel
®
Atom™ Processor E6xx Series Datasheet
263
9. Lock down the SPI registers, Offset 00h: SPIS – SPI Status bit 15
10.Set Up SMI based write protection as needed (same as FWH)
11.10 Watchdog Timer
11.10.1 Overview
This Watchdog timer provides a resolution that ranges from 1 µs to 10 minutes. The
timer uses a 35-bit down-counter.
After the interrupt is generated the WDT loads the value from the Preload register into
the WDT’s 35-bit Down-Counter and starts counting down. If the host fails to reload the
WDT before the timeout, the WDT drives the GPIO[4] pin high and sets the timeout bit
(WDT_TIMEOUT). This bit indicates that the System has become unstable. The GPIO[4]
pin is held high until the system is Reset or the WDT times out again (Depends on
TOUT_CNF). The process of reloading the WDT involves the following sequence of
writes:
1. Write “80” to offset WDTBA + 0Ch
2. Write “86” to offset WDTBA + 0Ch
3. Write ‘1’ to WDT_RELOAD in Reload Register.
The same process is used for setting the values in the preload registers. The only
difference exists in step 3. Instead of writing a ‘1’ to the WDT_RELOAD, you write the
desired preload value into the corresponding Preload register. This value is not loaded
into the 35-bit down counter until the next time the WDT reenters the stage. For
example, if Preload Value 2 is changed, it is not loaded into the 35-bit down counter
until the next time the WDT enters the second stage.
GPIO[4] is used for WDT output (WDT_TOUT) when it is not enabled for GPIO
(CGEN[4]=0).
11.10.2 Features
Selectable Prescaler – approximately 1 MHz (1 µs to 1 s) and approximately 1 KHz (1
ms to 10 min)
• 33 MHz Clock (30 ns Clock Ticks)
•WDT Mode:
Drives GPIO[4] high or inverts the previous value.
Used only after first timeout occurs.
Status bit preserved in RTC well for possible error detection and correction.
Drives GPIO[4] if OUTPUT is enabled.
• Timer can be disabled (default state) or Locked (Hard Reset required to disable
WDT).
WDT Automatic Reload of Preload value when WDT Reload Sequence is performed.
In WDT mode, users need to program the preload value 1 register to all 0’s.
11.10.3 Watchdog Timer Register Details
All registers not mentioned are reserved.