Datasheet

Intel
®
High Definition Audio
β
D27:F0
Intel
®
Atom™ Processor E6xx Series Datasheet
183
9.3.2.1.43 Offset 1004h: INRC – Input Stream Repeat Count Register
9.3.2.1.44 Offset 1008h: OUTRC – Output Stream Repeat Count Register
12 :11 0 RW RSVD Reserved
10 : 06 0 RO RSVD Reserved
05 :04 0 WO IRCR
Input Repeat Count Resets: Software writes a 1 to clear the
respective Repeat Count to 00h. Reads from these bits return 0.
Bit 5 = Input Stream 1 Repeat Count Reset
Bit 4 = Input Stream 0 Repeat Count Reset
03 :02 0 RO RSVD Reserved
01 :00 0 WO ORCR
Output Repeat Count Resets: Software writes a 1 to clear the
respective Repeat Count to 00h. Reads from these bits return 0.
Bit 1 = Output Stream 1 Repeat Count Reset
Bit 0 = Output Stream 0 Repeat Count Reset
Table 268. 1004h: INRC – Input Stream Repeat Count Register
Size: 32 bit Default: 0000_0000h Power Well: Core
Access
PCI Configuration B:D:F 0:27:0
Offset Start:
Offset End:
1004h
1007h
Memory Mapped IO BAR: Offset:
Bit Range Default Access Acronym Description
31 :16 00h RO RSVD Reserved
15 :08 00h RO IN1RC
Input Stream 1 Repeat Count: This field reports the number of times a
buffer descriptor list has been repeated.
07 :00 00h RO IN0RC
Input Stream 0 Repeat Count: This field reports the number of times a
buffer descriptor list has been repeated.
Table 269. 1008h: OUTRC – Output Stream Repeat Count Register
Size: 32 bit Default: 0000_0000h Power Well: Core
Access
PCI Configuration B:D:F 0:27:0
Offset Start:
Offset End:
1008h
100Bh
Memory Mapped IO BAR: Offset:
Bit Range Default Access Acronym Description
31 :16 00h RO RSVD Reserved
15 :08 00h RO OUT1RC
Output Stream 1 Repeat Count: This field reports the number of times
a buffer descriptor list has been repeated.
07 :00 00h RO OUT0RC
Output Stream 0 Repeat Count: This field reports the number of times
a buffer descriptor list has been repeated.
Table 267. 1000h: EM1 – Extended Mode 1 Register (Sheet 2 of 2)
Size: 32 bit Default: 0000_0000h Power Well: Core
Access
PCI Configuration B:D:F 0:27:0
Offset Start:
Offset End:
1000h
1003h
Memory Mapped IO BAR: Offset:
Bit Range Default Access Acronym Description