Datasheet

Intel
®
High Definition Audio
β
D27:F0
Intel
®
Atom™ Processor E6xx Series Datasheet
173
9.3.2.1.28 Offset 60h: IC – Immediate Command Register
9.3.2.1.29 Offset 64h: IR – Immediate Response Register
9.3.2.1.30 Offset 68h: ICS – Immediate Command Status
Table 253. 60h: IC – Immediate Command Register
Size: 32 bit Default: 0000_0000h Power Well: Core
Access
PCI Configuration B:D:F 0:27:0
Offset Start:
Offset End:
60h
63h
Memory Mapped IO BAR: LBAR Offset:
Bit Range Default Access Acronym Description
31 :00 0 RW ICW
Immediate Command Write: The command to be sent to the codec via
the Immediate Command mechanism is written to this register. The
command stored in this register is sent out over the link during the next
available frame after a 1 is written to the ICB bit (LBAR +68h: bit 0).
Table 254. 64h: IR – Immediate Response Register
Size: 32 bit Default: 0000_0000h Power Well: Core
Access
PCI Configuration B:D:F 0:27:0
Offset Start:
Offset End:
64h
67h
Memory Mapped IO BAR: LBAR Offset:
Bit Range Default Access Acronym Description
31 :00 0 RO IRR
Immediate Response Read: This register contains the response
received from a codec resulting from a command sent via the Immediate
Command mechanism.
If multiple codecs responded in the same frame, there is no guarantee as
to which response will be latched. Therefore broadcast-type commands
must not be issued via the Immediate Command mechanism.
Table 255. 68h: ICS – Immediate Command Status (Sheet 1 of 2)
Size: 16 bit Default: 0000h Power Well: Core
Access
PCI Configuration B:D:F 0:27:0
Offset Start:
Offset End:
68h
69h
Memory Mapped IO BAR: LBAR Offset:
Bit Range Default Access Acronym Description
15 :02 0 RO RSVD Reserved
01 0 RWC IRV
Immediate Result Valid: This bit is set to a ‘1’ by hardware when a
new response is latched into the IRR register. This is a status flag
indicating that software may read the response from the Immediate
Response register.
Software must clear this bit (by writing a one to it) before issuing a new
command so that the software may determine when a new response has
arrived.