Datasheet

Contents
Intel
®
Atom™ Processor E6xx Series Datasheet
17
219 120h: VC1CTL – VC1 Resource Control Register ......................................................... 155
220 126h: VC1STS – VC1 Resource Status Register.......................................................... 156
221 130h: RCCAP – Root Complex Link Declaration Enhanced Capability Header Register ...... 156
222 134h: ESD – Element Self Description Register .......................................................... 156
223 140h: L1DESC – Link 1 Description Register .............................................................. 157
224 148h: L1ADD – Link 1 Address Register .................................................................... 157
225 Intel
®
HD Audio
β
Register Summary......................................................................... 158
226 00h: GCAP – Global Capabilities Register................................................................... 160
227 02h: VMIN – Minor Version Register ......................................................................... 160
228 03h: VMAJ – Major Version...................................................................................... 161
229 04h: OUTPAY – Output Payload Capability Register..................................................... 161
230 06h: INPAY – Input Payload Capability Register ......................................................... 161
231 08h: GCTL – Global Control..................................................................................... 162
232 0Ch: WAKEEN – Wake Enable.................................................................................. 163
233 0Eh: STATESTS – State Change Status..................................................................... 164
234 10h: GSTS – Global Status...................................................................................... 164
235 14h: ECAP - Extended Capabilities............................................................................ 165
236 18h: STRMPAY – Stream Payload Capability Register .................................................. 165
237 20h: INTCTL - Interrupt Control Register................................................................... 165
238 24h: INTSTS - Interrupt Status Register ................................................................... 166
239 30h: WALCLK – Wall Clock Counter Register.............................................................. 167
240 38h: SSYNC –Stream Synchronization Register.......................................................... 167
241 40h: CORBBASE - CORB Base Address Register ......................................................... 168
242 48h: CORBWP - CORB Write Pointer Register............................................................. 168
243 4Ah: CORBRP - CORB Read Pointer Register .............................................................. 168
244 4Ch: CORBCTL - CORB Control Register.................................................................... 169
245 4Dh: CORBSTS - CORB Status Register..................................................................... 169
246 4Eh: CORBSIZE - CORB Size Register....................................................................... 170
247 50h: RIRBBASE - RIRB Base Address Register ........................................................... 170
248 58h: RIRBWP - RIRB Write Pointer Register............................................................... 170
249 5Ah: RINTCNT – Response Interrupt Count Register ................................................... 171
250 5Ch: RIRBCTL - RIRB Control Register ...................................................................... 171
251 5Dh: RIRBSTS - RIRB Status Register....................................................................... 172
252 5Eh: RIRBSIZE - RIRB Size Register ......................................................................... 172
253 60h: IC – Immediate Command Register................................................................... 173
254 64h: IR – Immediate Response Register ................................................................... 173
255 68h: ICS – Immediate Command Status ................................................................... 173
256 70h: DPBASE – DMA Position Base Address Register................................................... 174
257 80h, A0h, C0h, E0h: ISD0CTL, ISD1CTL, OSD0CTL, OSD1CTL – Input/Output Stream
Descriptor [0-1] Control Register ............................................................................. 175
258 83h, A3h, C3h, E3h: ISD0STS, ISD1STS, OSD0STS, OSD1STS – Input/Output Stream
Descriptor [0-1] Status Register............................................................................... 176
259 84h, A4h, C4h, E4h: ISD0LPIB, ISD1LPIB, OSD0LPIB, OSD1LPIB – Input/Output Stream
Descriptor [0-1] Link Position in Buffer Register ......................................................... 177
260 88h, A8h, C8h, E8h: ISD0CBL, ISD1CBL, OSD0CBL, OSD1CBL– Input/Output Stream
Descriptor [0-1] Cyclic Buffer Length Register............................................................ 177
261 8Ch, ACh, CCh, ECh: ISD0LVI, ISD1LVI, OSD0LVI, OSD1LVI– Input/Output Stream
Descriptor [0-1] Last Valid Index Register ................................................................. 177
262 8Eh, AEh, CEh, EEh: ISD0FIFOW, ISD1FIFOW, OSD0FIFOW, OSD1FIFOW– Input/Output
Stream Descriptor [0-1] FIFO Watermark Register ..................................................... 178
263 90h, B0h: ISD0FIFOS, ISD1FIFOS – Input Stream Descriptor [0-1] FIFO Size Register.... 179
264 D0h, F0h: OSD0FIFOS, OSD1FIFOS – Output Stream Descriptor [0-1] FIFO Size Register 179
265 92h, B2h, D2h, F2h: ISD0FMT, ISD1FMT, OSD0FMT, OSD1FMT – Input/Output Stream
Descriptor [0-1] Format Register.............................................................................. 180