Datasheet

Intel
®
High Definition Audio
β
D27:F0
Intel
®
Atom™ Processor E6xx Series Datasheet
161
9.3.2.1.3 Offset 03h: VMAJ – Major Version
9.3.2.1.4 Offset 04h: OUTPAY – Output Payload Capability Register
9.3.2.1.5 Offset 06h: INPAY – Input Payload Capability Register
Table 228. 03h: VMAJ – Major Version
Size: 8 bit Default: 01h Power Well: Core
Access
PCI Configuration B:D:F 0:27:0
Offset Start:
Offset End:
03h
03h
Memory Mapped IO BAR: LBAR Offset:
Bit Range Default Access Acronym Description
07 :00 01h RO VMAJ
Major Version: Indicates that the processor supports major revision
number 1 of the Intel
®
HD Audio
β
specification.
Table 229. 04h: OUTPAY – Output Payload Capability Register
Size: 16 bit Default: 003Ch Power Well: Core
Access
PCI Configuration B:D:F 0:27:0
Offset Start:
Offset End:
04h
05h
Memory Mapped IO BAR: LBAR Offset:
Bit Range Default Access Acronym Description
15 :07 0 RO RSVD Reserved
06 :00 3Ch RO OUTPAY
Output Payload Capability: Indicates the total output payload
available on the link. This does not include bandwidth used for command
and control. This measurement is in 16-bit word quantities per 48 kHz
frame. The default link clock speed of 24.000 MHz (the data is double
pumped) provides 1000 bits per frame, or 62.5 words in total. 40 bits are
used for command and control, leaving 60 words available for data
payload.
00h: 0 words
01h: 1 word payload
…
FFh: 255h word payload
Table 230. 06h: INPAY – Input Payload Capability Register (Sheet 1 of 2)
Size: 16 bit Default: 001Dh Power Well: Core
Access
PCI Configuration B:D:F 0:27:0
Offset Start:
Offset End:
06h
07h
Memory Mapped IO BAR: LBAR Offset:
Bit Range Default Access Acronym Description
15 :07 0 RO RSVD Reserved