Datasheet

Intel
®
High Definition Audio
β
D27:F0
Intel
®
Atom™ Processor E6xx Series Datasheet
154
9.3.1.35 Offset 108h: PVCCAP2 – Port VC Capability Register 2
9.3.1.36 Offset 10Ch: PVCCTL – Port VC Control Register
9.3.1.37 Offset 10Eh: PVCSTS – Port VC Status Register
9.3.1.38 Offset 110h: VC0CAP – VC0 Resource Capability Register
Table 212. 108h: PVCCAP2 – Port VC Capability Register 2
Size: 32 bit Default: 0000 0000h Power Well: Core
Access
PCI Configuration B:D:F 0:27:0
Offset Start:
Offset End:
108h
10Bh
Bit Range Default Access Acronym Description
31 :00 0 RO RSVD Reserved
Table 213. 10Ch: PVCCTL – Port VC Control Register
Size: 16 bit Default: 00000h Power Well: Core
Access
PCI Configuration B:D:F 0:27:0
Offset Start:
Offset End:
10Ch
10Dh
Bit Range Default Access Acronym Description
15 :00 0 RO RSVD Reserved
Table 214. 10Eh: PVCSTS – Port VC Status Register
Size: 16 bit Default: 0000h Power Well: Core
Access
PCI Configuration B:D:F 0:27:0
Offset Start:
Offset End:
10Eh
10Fh
Bit Range Default Access Acronym Description
15 :00 0 RO RSVD Reserved
Table 215. 110h: VC0CAP – VC0 Resource Capability Register
Size: 32 bit Default: 0000 0000h Power Well: Core
Access
PCI Configuration B:D:F 0:27:0
Offset Start:
Offset End:
110h
113h
Bit Range Default Access Acronym Description
31 :00 0 RO RSVD Reserved