Datasheet

Contents
Intel
®
Atom™ Processor E6xx Series Datasheet
15
109 Offset 0Eh: HDR - Header Type................................................................................ 105
110 Offset 10h: MMADR - Memory Mapped Base Address .................................................. 105
111 Offset 14h: IOBAR - I/O Base Address ...................................................................... 106
112 Offset 34h: CAP_PTR - Capabilities Pointer ................................................................ 106
113 Offset 3Ch: INTR - Interrupt Information .................................................................. 106
114 Offset 58h: SSRW - Software Scratch Read Write....................................................... 107
115 Offset 60h: HSRW - Hardware Scratch Read Write...................................................... 107
116 Offset 90h: MID - Message Signaled Interrupts Capability............................................ 107
117 Offset 92h: MC - Message Control ............................................................................ 107
118 Offset 94h: MA - Message Address ........................................................................... 108
119 Offset 98h: MD - Message Data ............................................................................... 108
120 Offset C4h: FD - Functional Disable .......................................................................... 108
121 Offset E0h: SWSCISMI - Software SCI/SMI ............................................................... 109
122 Offset E4h: ASLE - System Display Event Register...................................................... 109
123 Offset F0h: GCR - Graphics Clock Ratio..................................................................... 109
124 Offset F4h: LBB - Legacy Backlight Brightness ........................................................... 110
125 MSI vs. PCI IRQ Actions.......................................................................................... 111
126 PCI Type 1 Bridge Header ....................................................................................... 112
127 Offset 00h: VID — Vendor Identification.................................................................... 113
128 Offset 02h: DID — Device Identification.................................................................... 114
129 Offset 04h: CMD — PCI Command............................................................................ 114
130 Offset 06h: PSTS — Primary Status.......................................................................... 115
131 Offset 08h: RID — Revision Identification.................................................................. 115
132 Offset 09h: CC — Class Code................................................................................... 115
133 Offset 0Ch: CLS — Cache Line Size........................................................................... 116
134 Offset 0Eh: HTYPE — Header Type ........................................................................... 116
135 Offset 18h: PBN — Primary Bus Number ................................................................... 116
136 Offset 19h: SCBN — Secondary Bus Number ............................................................. 117
137 Offset 1Ah: SBBN — Subordinate Bus Number ........................................................... 117
138 Offset 1Ch: IOBASE — I/O Base Address................................................................... 117
139 Offset 1Dh: IOLIMIT — I/O Limit Address.................................................................. 118
140 Offset 1Eh: SSTS — Secondary Status...................................................................... 118
141 Offset 20h: MB — Memory Base Address................................................................... 119
142 Offset 22h: ML — Memory Limit Address................................................................... 119
143 Offset 24h: PMB — Prefetchable Memory Base Address ............................................... 120
144 Offset 26h: PML — Prefetchable Memory Limit Address ............................................... 120
145 Offset 34h: CAPP — Capabilities Pointer .................................................................... 120
146 Offset 3Ch: ILINE — Interrupt Line........................................................................... 121
147 Offset 3Dh: IPIN — Interrupt Pin.............................................................................. 121
148 Offset 3Eh: BCTRL — Bridge Control......................................................................... 121
149 Root Port Capability Structure.................................................................................. 122
150 Offset 40h: CLIST — Capabilities List........................................................................ 123
151 Offset 42h: XCAP — PCI Express* Capabilities ........................................................... 123
152 Offset 44h: DCAP — Device Capabilities .................................................................... 123
153 Offset 48h: DCTL — Device Control .......................................................................... 124
154 Offset 4Ah: DSTS — Device Status........................................................................... 125
155 Offset 4Ch: LCAP — Link Capabilities ........................................................................ 125
156 Offset 50h: LCTL — Link Control .............................................................................. 126
157 Offset 52h: LSTS — Link Status ............................................................................... 126
158 Offset 54h: SLCAP — Slot Capabilities....................................................................... 127
159 Offset 58h: SLCTL — Slot Control............................................................................. 127
160 Offset 5Ah: SLSTS — Slot Status ............................................................................. 128
161 Offset 5Ch: RCTL — Root Control ............................................................................. 129
162 Offset 5Eh: RCAP — Root Capabilities ....................................................................... 129
163 Offset 60h: RSTS — Root Status .............................................................................. 129