Datasheet

Intel
®
High Definition Audio
β
D27:F0
Intel
®
Atom™ Processor E6xx Series Datasheet
139
9.2.2 Undock Sequence
There are two possible undocking scenarios. The first is the one that is initiated by the
user that invokes software and gracefully shuts down the dock codecs before they are
undocked. The second is referred to as the “surprise undock” where the user undocks
while the dock codec is running. Both of these situations appear the same to the
controller as it is not cognizant of the “surprise removal”.
1. In the docked quiescent state, the Dock Attach (DCKCTL.DA) bit and the Dock Mate
(DCKSTS.DM) bit are both asserted. The HDA_DOCK_EN_B signal is asserted and
HDA_DOCKRST_B is de-asserted.
2. The user initiates an undock event through the GUI interface or by pushing a
button. This mechanism is outside the scope of this section of the document. Either
way ACPI BIOS software will be invoked to manage the undock process.
3. ACPI BIOS will call the The Intel
®
HD Audio
β
Bus Driver driver software in order to
halt the stream to the dock codec(s) prior to electrical undocking. If the Intel
®
HD
Audio
β
Bus Driver is not capable of halting the stream to the docked codec, ACPI
BIOS will initiate the hardware undocking sequence as described in the next step
while the dock stream is still running. From this standpoint, the result is similar to
the “surprise undock” scenario where an audio glitch may occur to the docked
codec(s) during the undock process.
4. The ACPI BIOS initiates the hardware undocking sequence by writing a 0 to the
DCKCTL.DA bit.
5. The Intel
®
HD Audio
β
controller asserts HDA_DOCKRST_B. HDA_DOCKRST_B
assertion shall be synchronous to HDA_CLK. HDA_DOCKRST_B assertion will occur
a minimum of 4 HDA_CLKs after the completion of the current frame. Note that the
Intel
®
HD Audio
β
link reset specification requirement that the last Frame sync be
skipped will not be met.
6. A minimum of four HDA_CLKs after HDA_DOCKRST_B the controller will de-assert
HDA_DOCK_EN_B to isolate the dock codec signals from the Intel
®
HD Audio
β
link
signals. HDA_DOCK_EN_B is de-asserted synchronously to HDA_CLK and timed
such that HDA_CLK, HDA_SYNC, and HDA_SDO are low.
7. After this hardware undocking sequence is complete, the controller hardware clears
the DCKSTS.DM bit to 0 indicating that the dock is now un-mated. ACPI BIOS
software polls DCKSTS.DM and when it sees DM set, conveys to the end user that
physical undocking can proceed. The controller is now ready for a subsequent
docking event.
9.2.3 Relationship Between HDA_DOCKRST_B and HDA_RST_B
HDA_RST_B will be asserted when a RESET_B occurs or when the CRST_B bit is 0. As
long as HDA_RST_B is asserted, the HDA_DOCKRST_B signal will also be asserted.
When RESET_B is asserted, the DCKCTL.DA and DCKSTS.DM bits will be get cleared to
their default state (0’s), and the dock state machine will be reset such that
HDA_DOCK_EN_B will be de-asserted, and HDA_DOCKRST_B will be asserted. After
any RESET_B, POST BIOS software is responsible for detecting that a dock is attached
and then writing a “1” to the DCKCTL.DA bit prior to the Intel
®
HD Audio
β
Bus Driver
de-asserting CRST_B.
When CRST_B bit is “0” (asserted), the DCKCTL.DA bit is not cleared. The dock state
machine will be reset such that HDA_DOCK_EN_B will be de-asserted,
HDA_DOCKRST_B will be asserted and the DCKSTS.DM bit will be cleared to reflect this
state. When the CRST_B bit is de-asserted, the dock state machine will detect that
DCKCTL.DA is set to “1” and will begin sequencing through the dock process. Note that
this does not require any software intervention.