Datasheet
Datasheet 17
Features Summary
1.7 Terminology
Term Description
BLT Block Level Transfer
CRT Cathode Ray Tube
DDR3 Third-generation Double Data Rate SDRAM memory technology
DP DisplayPort*
DMA Direct Memory Access
DMI Direct Media Interface
DTS Digital Thermal Sensor
ECC Error Correction Code
eDP* Embedded DisplayPort*
Intel® DPST Intel
®
Display Power Saving Technology
Enhanced Intel
SpeedStep®
Technology
Technology that provides power management capabilities to laptops.
Execute Disable Bit The Execute Disable bit allows memory to be marked as executable or
non-executable, when combined with a supporting operating system.
If code attempts to run in non-executable memory the processor
raises an error to the operating system. This feature can prevent some
classes of viruses or worms that exploit buffer overrun vulnerabilities
and can thus help improve the overall security of the system. See the
Intel® 64 and IA-32 Architectures Software Developer's Manuals for
more detailed information.
(G)MCH Legacy component - Graphics Memory Controller Hub
GPU Graphics Processing Unit
ICH The legacy I/O Controller Hub component that contains the main PCI
interface, LPC interface, USB2, Serial ATA, and other I/O functions. It
communicates with the legacy (G)MCH over a proprietary interconnect
called DMI.
IMC Integrated Memory Controller
Intel® 64 Technology 64-bit memory extensions to the IA-32 architecture
ITPM Integrated Trusted Platform Module
IOV I/O Virtualization
LCD Liquid Crystal Display
LVDS Low Voltage Differential Signaling. A high speed, low power data
transmission standard used for display connections to LCD panels.
MCP Multi-Chip Package.
NCTF Non-Critical to Function. NCTF locations are typically redundant
ground or non-critical reserved, so the loss of the solder joint
continuity at end of life conditions will not affect the overall product
functionality.
Nehalem Intels 45-nm processor design, follow-on to the 45-nm Penryn design.