Specifications

Intel
®
64 and IA-32 Architectures Software Developer’s Manual Documentation Changes 82
Documentation Changes
LOOP/LOOPcc—Loop According to ECX Counter
Instruction Operand Encoding
...
LSL—Load Segment Limit
Instruction Operand Encoding
...
Opcode Instruction Op/
En
64-Bit
Mode
Compat/
Leg Mode
Description
E2 cb LOOP rel8 A Valid Valid Decrement count; jump
short if count ≠ 0.
E1 cb LOOPE rel8 A Valid Valid Decrement count; jump
short if count ≠ 0 and ZF =
1.
E0 cb LOOPNE rel8 A Valid Valid Decrement count; jump
short if count ≠ 0 and ZF =
0.
Op/En Operand 1 Operand 2 Operand 3 Operand 4
AOffset NA NA NA
Opcode Instruction Op/
En
64-Bit
Mode
Compat/
Leg Mode
Description
0F 03 /r LSL r16, r16/m16 AValid Valid Load: r16 ← segment limit,
selector r16/m16.
0F 03 /r LSL r32, r32/m16
*
AValid Valid Load: r32 ← segment limit,
selector r32/m16.
REX.W + 0F 03
/r
LSL r64, r32/m16
*
AValid Valid Load: r64 ← segment limit,
selector r32/m16
NOTES:
* For all loads (regardless of destination sizing), only bits 16-0 are used. Other bits are ignored.
Op/En Operand 1 Operand 2 Operand 3 Operand 4
A ModRM:reg (w) ModRM:r/m (r) NA NA