Specifications

Intel
®
64 and IA-32 Architectures Software Developer’s Manual Documentation Changes 63
Documentation Changes
IN—Input from Port
Instruction Operand Encoding
...
INC—Increment by 1
Opcode Instruction Op/
En
64-Bit
Mode
Compat/
Leg Mode
Description
E4 ib IN AL, imm8 A Valid Valid Input byte from imm8 I/O
port address into AL.
E5 ib IN AX, imm8 A Valid Valid Input word from imm8 I/O
port address into AX.
E5 ib IN EAX, imm8 A Valid Valid Input dword from imm8 I/O
port address into EAX.
EC IN AL,DX B Valid Valid Input byte from I/O port in
DX into AL.
ED IN AX,DX B Valid Valid Input word from I/O port in
DX into AX.
ED IN EAX,DX B Valid Valid Input doubleword from I/O
port in DX into EAX.
Op/En Operand 1 Operand 2 Operand 3 Operand 4
Aimm8 NA NA NA
BNA NA NA NA
Opcode Instruction Op/
En
64-Bit
Mode
Compat/
Leg Mode
Description
FE /0 INC r/m8 AValid Valid Increment r/m byte by 1.
REX + FE /0 INC r/m8
*
AValid N.E. Increment r/m byte by 1.
FF /0 INC r/m16 AValid Valid Increment r/m word by 1.
FF /0 INC r/m32 AValid Valid Increment r/m doubleword
by 1.
REX.W + FF /0 INC r/m64 AValid N.E. Increment r/m quadword by
1.
40+ rw
**
INC r16 B N.E. Valid Increment word register by
1.
40+ rd INC r32 BN.E. Valid Increment doubleword
register by 1.
NOTES:
* In 64-bit mode, r/m8 can not be encoded to access the following byte registers if a REX prefix is
used: AH, BH, CH, DH.
**40H through 47H are REX prefixes in 64-bit mode.