Specifications

Intel
®
64 and IA-32 Architectures Software Developer’s Manual Documentation Changes 59
Documentation Changes
FXRSTOR—Restore x87 FPU, MMX , XMM, and MXCSR State
Instruction Operand Encoding
...
FXSAVE—Save x87 FPU, MMX Technology, and SSE State
Instruction Operand Encoding
...
HADDPD—Packed Double-FP Horizontal Add
Instruction Operand Encoding
...
Opcode Instruction Op/
En
64-Bit
Mode
Compat/
Leg Mode
Description
0F AE /1 FXRSTOR
m512byte
A Valid Valid Restore the x87 FPU, MMX,
XMM, and MXCSR register
state from m512byte.
REX.W+ 0F AE /
1
FXRSTOR64
m512byte
A Valid N.E. Restore the x87 FPU, MMX,
XMM, and MXCSR register
state from m512byte.
Op/En Operand 1 Operand 2 Operand 3 Operand 4
A ModRM:r/m (r) NA NA NA
Opcode Instruction Op/
En
64-Bit
Mode
Compat/
Leg Mode
Description
0F AE /0 FXSAVE
m512byte
AValid Valid Save the x87 FPU, MMX,
XMM, and MXCSR register
state to m512byte.
REX.W+ 0F AE /
0
FXSAVE64
m512byte
A Valid N.E. Save the x87 FPU, MMX,
XMM, and MXCSR register
state to m512byte.
Op/En Operand 1 Operand 2 Operand 3 Operand 4
A ModRM:r/m (w) NA NA NA
Opcode Instruction Op/
En
64-Bit
Mode
Compat/
Leg Mode
Description
66 0F 7C /r HADDPD xmm1,
xmm2/m128
A Valid Valid Horizontal add packed
double-precision floating-
point values from
xmm2/m128 to xmm1.
Op/En Operand 1 Operand 2 Operand 3 Operand 4
A ModRM:reg (r, w) ModRM:r/m (r) NA NA