Specifications

Intel
®
64 and IA-32 Architectures Software Developer’s Manual Documentation Changes 54
Documentation Changes
DEC—Decrement by 1
Instruction Operand Encoding
...
DIV—Unsigned Divide
Opcode Instruction Op/
En
64-Bit
Mode
Compat/
Leg Mode
Description
FE /1 DEC r/m8 AValid Valid Decrement r/m8 by 1.
REX + FE /1 DEC r/m8
*
A Valid N.E. Decrement r/m8 by 1.
FF /1 DEC r/m16 AValid Valid Decrement r/m16 by 1.
FF /1 DEC r/m32 AValid Valid Decrement r/m32 by 1.
REX.W + FF /1 DEC r/m64 A Valid N.E. Decrement r/m64 by 1.
48+rw DEC r16 B N.E. Valid Decrement r16 by 1.
48+rd DEC r32 B N.E. Valid Decrement r32 by 1.
NOTES:
* In 64-bit mode, r/m8 can not be encoded to access the following byte registers if a REX prefix is
used: AH, BH, CH, DH.
Op/En Operand 1 Operand 2 Operand 3 Operand 4
A ModRM:r/m (r, w) NA NA NA
B reg (r, w) NA NA NA
Opcode Instruction Op/
En
64-Bit
Mode
Compat/
Leg Mode
Description
F6 /6 DIV r/m8 A Valid Valid Unsigned divide AX by r/m8,
with result stored in AL ←
Quotient, AH ← Remainder.
REX + F6 /6 DIV r/m8
*
A Valid N.E. Unsigned divide AX by r/m8,
with result stored in AL ←
Quotient, AH ← Remainder.
F7 /6 DIV r/m16 A Valid Valid Unsigned divide DX:AX by
r/m16, with result stored in
AX ← Quotient, DX ←
Remainder.
F7 /6 DIV r/m32 A Valid Valid Unsigned divide EDX:EAX by
r/m32, with result stored in
EAX ← Quotient, EDX ←
Remainder.
REX.W + F7 /6 DIV r/m64 A Valid N.E. Unsigned divide RDX:RAX
by r/m64, with result stored
in RAX ← Quotient, RDX ←
Remainder.
NOTES:
* In 64-bit mode, r/m8 can not be encoded to access the following byte registers if a REX prefix is
used: AH, BH, CH, DH.