Specifications

Intel
®
64 and IA-32 Architectures Software Developer’s Manual Documentation Changes 51
Documentation Changes
CVTTPS2DQ—Convert with Truncation Packed Single-Precision FP Values
to Packed Dword Integers
Instruction Operand Encoding
...
CVTTPS2PI—Convert with Truncation Packed Single-Precision FP Values
to Packed Dword Integers
Instruction Operand Encoding
...
Opcode Instruction Op/
En
64-Bit
Mode
Compat/
Leg Mode
Description
F3 0F 5B /r CVTTPS2DQ
xmm1,
xmm2/m128
A Valid Valid Convert four single-
precision floating-point
values from xmm2/m128 to
four signed doubleword
integers in xmm1 using
truncation.
Op/En Operand 1 Operand 2 Operand 3 Operand 4
A ModRM:reg (w) ModRM:r/m (r) NA NA
Opcode Instruction Op/
En
64-Bit
Mode
Compat/
Leg Mode
Description
0F 2C /r CVTTPS2PI mm,
xmm/m64
A Valid Valid Convert two single-
precision floating-point
values from xmm/m64 to
two signed doubleword
signed integers in mm using
truncation.
Op/En Operand 1 Operand 2 Operand 3 Operand 4
A ModRM:reg (w) ModRM:r/m (r) NA NA