Specifications

Intel
®
64 and IA-32 Architectures Software Developer’s Manual Documentation Changes 50
Documentation Changes
Instruction Operand Encoding
...
CVTTPD2DQ—Convert with Truncation Packed Double-Precision FP
Values to Packed Dword Integers
Instruction Operand Encoding
...
CVTTPD2PI—Convert with Truncation Packed Double-Precision FP Values
to Packed Dword Integers
Instruction Operand Encoding
...
Op/En Operand 1 Operand 2 Operand 3 Operand 4
A ModRM:reg (w) ModRM:r/m (r) NA NA
Opcode Instruction Op/
En
64-Bit
Mode
Compat/
Leg Mode
Description
66 0F E6 CVTTPD2DQ
xmm1,
xmm2/m128
A Valid Valid Convert two packed double-
precision floating-point
values from xmm2/m128 to
two packed signed
doubleword integers in
xmm1 using truncation.
Op/En Operand 1 Operand 2 Operand 3 Operand 4
A ModRM:reg (w) ModRM:r/m (r) NA NA
Opcode Instruction Op/
En
64-Bit
Mode
Compat/
Leg Mode
Description
66 0F 2C /r CVTTPD2PI mm,
xmm/m128
A Valid Valid Convert two packer double-
precision floating-point
values from xmm/m128 to
two packed signed
doubleword integers in mm
using truncation.
Op/En Operand 1 Operand 2 Operand 3 Operand 4
A ModRM:reg (w) ModRM:r/m (r) NA NA