Specifications

Intel
®
64 and IA-32 Architectures Software Developer’s Manual Documentation Changes 48
Documentation Changes
CVTSD2SS—Convert Scalar Double-Precision FP Value to Scalar Single-
Precision FP Value
Instruction Operand Encoding
...
CVTSI2SD—Convert Dword Integer to Scalar Double-Precision FP Value
Instruction Operand Encoding
...
Opcode Instruction Op/
En
64-Bit
Mode
Compat/
Leg Mode
Description
F2 0F 5A /r CVTSD2SS xmm1,
xmm2/m64
A Valid Valid Convert one double-
precision floating-point
value in xmm2/m64 to one
single-precision floating-
point value in xmm1.
Op/En Operand 1 Operand 2 Operand 3 Operand 4
A ModRM:reg (w) ModRM:r/m (r) NA NA
Opcode Instruction Op/
En
64-Bit
Mode
Compat/
Leg Mode
Description
F2 0F 2A /r CVTSI2SD xmm,
r/m32
A Valid Valid Convert one signed
doubleword integer from
r/m32 to one double-
precision floating-point
value in xmm.
F2 REX.W 0F 2A
/r
CVTSI2SD xmm,
r/m64
A Valid N.E. Convert one signed
quadword integer from
r/m64 to one double-
precision floating-point
value in xmm.
Op/En Operand 1 Operand 2 Operand 3 Operand 4
A ModRM:reg (w) ModRM:r/m (r) NA NA