Specifications

Intel
®
64 and IA-32 Architectures Software Developer’s Manual Documentation Changes 47
Documentation Changes
Instruction Operand Encoding
...
CVTPS2PI—Convert Packed Single-Precision FP Values to Packed Dword
Integers
Instruction Operand Encoding
...
CVTSD2SI—Convert Scalar Double-Precision FP Value to Integer
Instruction Operand Encoding
...
Op/En Operand 1 Operand 2 Operand 3 Operand 4
A ModRM:reg (w) ModRM:r/m (r) NA NA
Opcode Instruction Op/
En
64-Bit
Mode
Compat/
Leg Mode
Description
0F 2D /r CVTPS2PI mm,
xmm/m64
A Valid Valid Convert two packed single-
precision floating-point
values from xmm/m64 to
two packed signed
doubleword integers in mm.
Op/En Operand 1 Operand 2 Operand 3 Operand 4
A ModRM:reg (w) ModRM:r/m (r) NA NA
Opcode Instruction Op/
En
64-Bit
Mode
Compat/
Leg Mode
Description
F2 0F 2D /r CVTSD2SI r32,
xmm/m64
A Valid Valid Convert one double-
precision floating-point
value from xmm/m64 to
one signed doubleword
integer r32.
F2 REX.W 0F
2D /r
CVTSD2SI r64,
xmm/m64
A Valid N.E. Convert one double-
precision floating-point
value from xmm/m64 to
one signed quadword
integer sign-extended into
r64.
Op/En Operand 1 Operand 2 Operand 3 Operand 4
A ModRM:reg (w) ModRM:r/m (r) NA NA