Specifications

Intel
®
64 and IA-32 Architectures Software Developer’s Manual Documentation Changes 41
Documentation Changes
COMISS—Compare Scalar Ordered Single-Precision Floating-Point Values
and Set EFLAGS
Instruction Operand Encoding
...
CPUID—CPU Identification
Instruction Operand Encoding
...
Opcode Instruction Op/
En
64-Bit
Mode
Compat/
Leg Mode
Description
0F 2F /r COMISS xmm1,
xmm2/m32
A Valid Valid Compare low single-
precision floating-point
values in xmm1 and
xmm2/mem32 and set the
EFLAGS flags accordingly.
Op/En Operand 1 Operand 2 Operand 3 Operand 4
A ModRM:reg (r) ModRM:r/m (r) NA NA
Opcode Instruction Op/
En
64-Bit
Mode
Compat/
Leg Mode
Description
0F A2 CPUID A Valid Valid Returns processor
identification and feature
information to the EAX,
EBX, ECX, and EDX
registers, as determined by
input entered in EAX (in
some cases, ECX as well).
Op/En Operand 1 Operand 2 Operand 3 Operand 4
ANA NA NA NA