Specifications

Intel
®
64 and IA-32 Architectures Software Developer’s Manual Documentation Changes 39
Documentation Changes
CMPXCHG—Compare and Exchange
Instruction Operand Encoding
...
Opcode Instruction Op/
En
64-Bit
Mode
Compat/
Leg Mode
Description
0F B0/r CMPXCHG r/m8, r8 AValid Valid* Compare AL with r/m8. If
equal, ZF is set and r8 is
loaded into r/m8. Else, clear
ZF and load r/m8 into AL.
REX + 0F B0/r CMPXCHG
r/m8**,r8
A Valid N.E. Compare AL with r/m8. If
equal, ZF is set and r8 is
loaded into r/m8. Else, clear
ZF and load r/m8 into AL.
0F B1/r CMPXCHG r/m16,
r16
A Valid Valid* Compare AX with r/m16. If
equal, ZF is set and r16 is
loaded into r/m16. Else,
clear ZF and load r/m16 into
AX.
0F B1/r CMPXCHG r/m32,
r32
A Valid Valid* Compare EAX with r/m32. If
equal, ZF is set and r32 is
loaded into r/m32. Else,
clear ZF and load r/m32 into
EAX.
REX.W + 0F
B1/r
CMPXCHG r/m64,
r64
A Valid N.E. Compare RAX with r/m64. If
equal, ZF is set and r64 is
loaded into r/m64. Else,
clear ZF and load r/m64 into
RAX.
NOTES:
* See the IA-32 Architecture Compatibility section below.
**In 64-bit mode, r/m8 can not be encoded to access the following byte registers if a REX prefix is
used: AH, BH, CH, DH.
Op/En Operand 1 Operand 2 Operand 3 Operand 4
A ModRM:r/m (r, w) ModRM:reg (r) NA NA