Specifications

Intel
®
64 and IA-32 Architectures Software Developer’s Manual Documentation Changes 37
Documentation Changes
Instruction Operand Encoding
...
CMPSD—Compare Scalar Double-Precision Floating-Point Values
Instruction Operand Encoding
...
Opcode Instruction Op/
En
64-Bit
Mode
Compat/
Leg Mode
Description
A7 CMPSD A Valid Valid For legacy mode, compare
dword at address DS:(E)SI
with dword at address
ES:(E)DI; For 64-bit mode
compare dword at address
(R|E)SI with dword at
address (R|E)DI. The status
flags are set accordingly.
REX.W + A7 CMPSQ A Valid N.E. Compares quadword at
address (R|E)SI with
quadword at address (R|E)DI
and sets the status flags
accordingly.
Op/En Operand 1 Operand 2 Operand 3 Operand 4
ANA NA NA NA
Opcode Instruction Op/
En
64-Bit
Mode
Compat/
Leg Mode
Description
F2 0F C2 /r ib CMPSD xmm1,
xmm2/m64, imm8
A Valid Valid Compare low double-
precision floating-point
value in xmm2/m64 and
xmm1 using imm8 as
comparison predicate.
Op/En Operand 1 Operand 2 Operand 3 Operand 4
A ModRM:reg (r, w) ModRM:r/m (r) imm8 NA