Specifications

Intel
®
64 and IA-32 Architectures Software Developer’s Manual Documentation Changes 36
Documentation Changes
CMPS/CMPSB/CMPSW/CMPSD/CMPSQ—Compare String Operands
Opcode Instruction Op/
En
64-Bit
Mode
Compat/
Leg Mode
Description
A6 CMPS m8, m8 A Valid Valid For legacy mode, compare
byte at address DS:(E)SI
with byte at address
ES:(E)DI; For 64-bit mode
compare byte at address
(R|E)SI to byte at address
(R|E)DI. The status flags are
set accordingly.
A7 CMPS m16, m16 A Valid Valid For legacy mode, compare
word at address DS:(E)SI
with word at address
ES:(E)DI; For 64-bit mode
compare word at address
(R|E)SI with word at address
(R|E)DI. The status flags are
set accordingly.
A7 CMPS m32, m32 A Valid Valid For legacy mode, compare
dword at address DS:(E)SI at
dword at address ES:(E)DI;
For 64-bit mode compare
dword at address (R|E)SI at
dword at address (R|E)DI.
The status flags are set
accordingly.
REX.W + A7 CMPS m64, m64 A Valid N.E. Compares quadword at
address (R|E)SI with
quadword at address (R|E)DI
and sets the status flags
accordingly.
A6 CMPSB A Valid Valid For legacy mode, compare
byte at address DS:(E)SI
with byte at address
ES:(E)DI; For 64-bit mode
compare byte at address
(R|E)SI with byte at address
(R|E)DI. The status flags are
set accordingly.
A7 CMPSW A Valid Valid For legacy mode, compare
word at address DS:(E)SI
with word at address
ES:(E)DI; For 64-bit mode
compare word at address
(R|E)SI with word at address
(R|E)DI. The status flags are
set accordingly.