Specifications

Intel
®
64 and IA-32 Architectures Software Developer’s Manual Documentation Changes 288
Documentation Changes
Register
Address Register Name
Scope
Bit Description
Hex Dec
407H 1031 MSR_MC1_MISC Package See Section 15.3.2.4, “IA32_MCi_MISC MSRs.
...
40BH 1035 MSR_MC2_MISC Core See Section 15.3.2.4, “IA32_MCi_MISC MSRs.
40CH 1036 MSR_MC3_CTL Core See Section 15.3.2.1, “IA32_MCi_CTL MSRs.
40DH 1037 MSR_MC3_
STATUS
Core See Section 15.3.2.2, “IA32_MCi_STATUS
MSRS.
40EH 1038 MSR_MC3_ADDR Core See Section 15.3.2.3, “IA32_MCi_ADDR MSRs.
The MSR_MC4_ADDR register is either not
implemented or contains no address if the
ADDRV flag in the MSR_MC4_STATUS register
is clear.
When not implemented in the processor, all
reads and writes to this MSR will cause a
general-protection exception.
40FH 1039 MSR_MC3_MISC Core See Section 15.3.2.4, “IA32_MCi_MISC MSRs.
410H 1040 MSR_MC4_CTL Core See Section 15.3.2.1, “IA32_MCi_CTL MSRs.
411H 1041 MSR_MC4_
STATUS
Core See Section 15.3.2.2, “IA32_MCi_STATUS
MSRS.
412H 1042 MSR_MC4_ADDR Core See Section 15.3.2.3, “IA32_MCi_ADDR MSRs.
The MSR_MC3_ADDR register is either not
implemented or contains no address if the
ADDRV flag in the MSR_MC3_STATUS register
is clear.
When not implemented in the processor, all
reads and writes to this MSR will cause a
general-protection exception.
413H 1043 MSR_MC4_MISC Core See Section 15.3.2.4, “IA32_MCi_MISC MSRs.
414H 1044 MSR_MC5_CTL Core See Section 15.3.2.1, “IA32_MCi_CTL MSRs.
415H 1045 MSR_MC5_
STATUS
Core See Section 15.3.2.2, “IA32_MCi_STATUS
MSRS.
416H 1046 MSR_MC5_ADDR Core See Section 15.3.2.3, “IA32_MCi_ADDR MSRs.
417H 1047 MSR_MC5_MISC Core See Section 15.3.2.4, “IA32_MCi_MISC MSRs.
418H 1048 MSR_MC6_CTL Package See Section 15.3.2.1, “IA32_MCi_CTL MSRs.
419H 1049 MSR_MC6_
STATUS
Package See Section 15.3.2.2, “IA32_MCi_STATUS
MSRS.” and Appendix E.
41AH 1050 MSR_MC6_ADDR Package See Section 15.3.2.3, “IA32_MCi_ADDR MSRs.
41BH 1051 MSR_MC6_MISC Package See Section 15.3.2.4, “IA32_MCi_MISC MSRs.
41CH 1052 MSR_MC7_CTL Package See Section 15.3.2.1, “IA32_MCi_CTL MSRs.
41DH 1053 MSR_MC7_
STATUS
Package See Section 15.3.2.2, “IA32_MCi_STATUS
MSRS.” and Appendix E.