Specifications

Intel
®
64 and IA-32 Architectures Software Developer’s Manual Documentation Changes 277
Documentation Changes
Non-Architectural Performance Events In Next Generation Processor Core (Codenamed
Westmere) (Continued)
Non-architectural Performance monitoring events of the uncore sub-system for Proces-
sors with CPUID signature of DisplayFamily_DisplayModel 06_25H, 06_2CH, and
06_1FH support performance events listed in Table A-5.
Table A-5 Non-Architectural Performance Events In the Processor Uncore for Next
Generation Intel Processor (Codenamed Wesmere)
B1H 3FH UOPS_EXECUTED.CO
RE_ACTIVE_CYCLES
Counts number of cycles there are
one or more uops being executed on
any ports. This is a core count only
and can not be collected per thread.
...
B7H 01H OFF_CORE_RESPONS
E_0
see Section 30.6.1.3, “Off-core
Response Performance Monitoring
in the Processor Core”
Requires
programming
MSR 01A6H
...
ECH 01H THREAD_ACTIVE Counts cycles threads are active.
...
Event
Num.
Umask
Value
Event Mask
Mnemonic Description Comment
...
02H 01H UNC_GQ_OCCUPANC
Y.READ_TRACKER
Increments the number of queue
entries (code read, data read, and
RFOs) in the tread tracker. The GQ
read tracker allocate to deallocate
occupancy count is divided by the
count to obtain the average read
tracker latency.
...
0CH 01H UNC_GQ_SNOOP.GOT
O_S
Counts the number of remote snoops
that have requested a cache line be
set to the S state.
0CH 02H UNC_GQ_SNOOP.GOT
O_I
Counts the number of remote snoops
that have requested a cache line be
set to the I state.
0CH 04H UNC_GQ_SNOOP.GOT
O_S_HIT_E
Counts the number of remote snoops
that have requested a cache line be
set to the S state from E state.
Requires
writing MSR
301H with
mask = 2H
0CH 04H UNC_GQ_SNOOP.GOT
O_S_HIT_F
Counts the number of remote snoops
that have requested a cache line be
set to the S state from F (forward)
state.
Requires
writing MSR
301H with
mask = 8H