Specifications

Intel
®
64 and IA-32 Architectures Software Developer’s Manual Documentation Changes 274
Documentation Changes
13. Updates to Appendix A, Volume 3B
Change bars show changes to Appendix A of the Intel
®
64 and IA-32 Architectures Soft-
ware Developer’s Manual, Volume 3B: System Programming Guide, Part 2.
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A.2 PERFORMANCE MONITORING EVENTS FOR
INTEL
®
CORE
™
I7 PROCESSOR FAMILY AND XEON
PROCESSOR FAMILY
Processors based on the Intel microarchitecture (Nehalem) support the architectural and
non-architectural performance-monitoring events listed in Table A-1 and Table A-2. The
events in Table A-2 generally applies to processors with CPUID signature of
DisplayFamily_DisplayModel encoding with the following values: 06_1AH, 06_1EH,
06_1FH, and 06_2EH. However, Intel Xeon processors with CPUID signature of
DisplayFamily_DisplayModel 06_2EH have a small number of events that are not
supported in processors with CPUID signature 06_1AH, 06_1EH, and 06_1FH. These
events are noted in the comment column.
In addition, these processors (CPUID signature of DisplayFamily_DisplayModel 06_1AH,
06_1EH, 06_1FH) also support the following non-architectural, product-specific uncore
performance-monitoring events listed in Table A-3.
Fixed counters in the core PMU support the architecture events defined in Table A-7.