Specifications

Intel
®
64 and IA-32 Architectures Software Developer’s Manual Documentation Changes 271
Documentation Changes
VMCS data cached by the processor are flushed to memory and that no
other software can corrupt the current VMM’s VMCS data. It is also
recommended that the VMM execute VMXOFF after such executions of
VMCLEAR.
The VMX capability MSR IA32_VMX_BASIC reports the memory type used by the
processor for accessing a VMCS or any data structures referenced through pointers in
the VMCS. Software must maintain the VMCS structures in cache-coherent memory.
Software must always map the regions hosting the I/O bitmaps, MSR bitmaps, VM-exit
MSR-store area, VM-exit MSR-load area, and VM-entry MSR-load area to the write-back
(WB) memory type. Mapping these regions to uncacheable (UC) memory type is
supported, but strongly discouraged due to negative impact on performance.
...
Figure 27-1 VMX Transitions and States of VMCS in a Logical Processor
(a) VMX Operation and VMX Transitions
(b) State of VMCS and VMX Operation
Processor
Operation
VMXON
VM Entry VM Entry
VM Entry VM Entry
VM Exit VM Exit
VM Exit
VM Exit
VMXOFF
Outside
VMX
Operation
VMX Root
Operation
VMX
Non-Root
Operation
Legend:
Legend:
Inactive
VMCS
Current VMCS
(working)
Active VMCS
(not current)
Current VMCS
(controlling)
VMCS B
VMCS A
VMLAUNCH
VMRESUME
VMPTRLD B
VMCLEAR B
VM Exit VM Exit
VMPTRLD A VMPTRLD A
VMCLEAR A
VM Exit VM Exit
VMLAUNCH VMRESUME