Specifications

Intel
®
64 and IA-32 Architectures Software Developer’s Manual Documentation Changes 262
Documentation Changes
8. Updates to Chapter 21, Volume 3B
Change bars show changes to Chapter 21 of the Intel
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64 and IA-32 Architectures Soft-
ware Developer’s Manual, Volume 3B: System Programming Guide, Part 2.
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21.1 OVERVIEW
A logical processor uses virtual-machine control data structures (VMCSs) while it is
in VMX operation. These manage transitions into and out of VMX non-root operation
(VM entries and VM exits) as well as processor behavior in VMX non-root operation. This
structure is manipulated by the new instructions VMCLEAR, VMPTRLD, VMREAD, and
VMWRITE.
A VMM can use a different VMCS for each virtual machine that it supports. For a virtual
machine with multiple logical processors (virtual processors), the VMM can use a
different VMCS for each virtual processor.
A logical processor associates a region in memory with each VMCS. This region is called
the VMCS region.
1
Software references a specific VMCS using the 64-bit physical
address of the region (a VMCS pointer). VMCS pointers must be aligned on a 4-KByte
boundary (bits 11:0 must be zero). On processors that support Intel 64 architecture,
these pointers must not set bits beyond the processor’s physical-address width.
2
On
processors that do not support Intel 64 architecture, they must not set any bits in the
range 63:32.
A logical processor may maintain a number of VMCSs that are active. The processor
may optimize VMX operation by maintaining the state of an active VMCS in memory, on
the processor, or both. At any given time, at most one of the active VMCSs is the current
VMCS. (This document frequently uses the term “the VMCS” to refer to the current
VMCS.) The VMLAUNCH, VMREAD, VMRESUME, and VMWRITE instructions operate only
on the current VMCS.
The following items describe how a logical processor determines which VMCSs are active
and which is current:
• The memory operand of the VMPTRLD instruction is the address of a VMCS. After
execution of the instruction, that VMCS is both active and current on the logical
processor. Any other VMCS that had been active remains so, but no other VMCS is
current.
• The memory operand of the VMCLEAR instruction is also the address of a VMCS.
After execution of the instruction, that VMCS is neither active nor current on the
logical processor. If the VMCS had been current on the logical processor, the logical
processor no longer has a current VMCS.
1. The amount of memory required for a VMCS region is at most 4 KBytes. The exact size is implemen-
tation specific and can be determined by consulting the VMX capability MSR IA32_VMX_BASIC to
determine the size of the VMCS region (see Appendix G.1).
2. Software can determine a processor’s physical-address width by executing CPUID with 80000008H
in EAX. The physical-address width is returned in bits 7:0 of EAX.