Specifications

Intel
®
64 and IA-32 Architectures Software Developer’s Manual Documentation Changes 24
Documentation Changes
BTC—Bit Test and Complement
Instruction Operand Encoding
...
BTR—Bit Test and Reset
Opcode Instruction Op/
En
64-bit
Mode
Compat/
Leg Mode
Description
0F BB BTC r/m16, r16 A Valid Valid Store selected bit in CF flag
and complement.
0F BB BTC r/m32, r32 A Valid Valid Store selected bit in CF flag
and complement.
REX.W + 0F BB BTC r/m64, r64 A Valid N.E. Store selected bit in CF flag
and complement.
0F BA /7 ib BTC r/m16, imm8 B Valid Valid Store selected bit in CF flag
and complement.
0F BA /7 ib BTC r/m32, imm8 B Valid Valid Store selected bit in CF flag
and complement.
REX.W + 0F BA
/7 ib
BTC r/m64, imm8 B Valid N.E. Store selected bit in CF flag
and complement.
Op/En Operand 1 Operand 2 Operand 3 Operand 4
A ModRM:r/m (r, w) ModRM:reg (r) NA NA
B ModRM:r/m (r, w) imm8 NA NA
Opcode Instruction Op/
En
64-bit
Mode
Compat/
Leg Mode
Description
0F B3 BTR r/m16, r16 A Valid Valid Store selected bit in CF flag
and clear.
0F B3 BTR r/m32, r32 A Valid Valid Store selected bit in CF flag
and clear.
REX.W + 0F B3 BTR r/m64, r64 A Valid N.E. Store selected bit in CF flag
and clear.
0F BA /6 ib BTR r/m16, imm8 B Valid Valid Store selected bit in CF flag
and clear.
0F BA /6 ib BTR r/m32, imm8 B Valid Valid Store selected bit in CF flag
and clear.
REX.W + 0F BA
/6 ib
BTR r/m64, imm8 B Valid N.E. Store selected bit in CF flag
and clear.