Specifications
Intel
®
64 and IA-32 Architectures Software Developer’s Manual Documentation Changes 212
Documentation Changes
The page-directory-pointer-table comprises four (4) 64-bit entries called PDPTEs. Each
PDPTE controls access to a 1-GByte region of the linear-address space. Corresponding to
the PDPTEs, the logical processor maintains a set of four (4) internal, non-architectural
PDPTE registers, called PDPTE0, PDPTE1, PDPTE2, and PDPTE3. The logical processor
loads these registers from the PDPTEs in memory as part of certain executions the MOV
to CR instruction:
• If PAE paging would be in use following an execution of MOV to CR0 or MOV to CR4
(see Section 4.1.1) and the instruction is modifying any of CR0.CD, CR0.NW,
CR0.PG, CR4.PAE, CR4.PGE, or CR4.PSE; then the PDPTEs are loaded from the
address in CR3.
• If MOV to CR3 is executed while the logical processor is using PAE paging, the
PDPTEs are loaded from the address being loaded into CR3.
• If PAE paging is in use and a task switch changes the value of CR3, the PDPTEs are
loaded from the address in the new CR3 value.
• Certain VMX transitions load the PDPTE registers. See Section 4.11.1.
...
.
6
3
6
2
6
1
6
0
5
9
5
8
5
7
5
6
5
5
5
4
5
3
5
2
5
1
M
1
NOTES:
1. M is an abbreviation for MAXPHYADDR.
M-1
3
2
3
1
3
0
2
9
2
8
2
7
2
6
2
5
2
4
2
3
2
2
2
1
2
0
1
9
1
8
1
7
1
6
1
5
1
4
1
3
1
2
1
1
1
09876543210
Ignored
2
2. CR3 has 64 bits only on processors supporting the Intel-64 architecture. These bits are ignored with
PAE paging.
Address of page-directory-pointer table
Ignored CR3
Reserved
3
Address of page directory Ign. Rsvd.
P
C
D
P
W
T
Rs
vd
1
PDPTE:
present
Ignored 0
PDTPE:
not
present
X
D
4
Ignored Rsvd.
Address of
2MB page frame
Reserved
P
A
T
Ign. G 1 DA
P
C
D
P
W
T
U
/
S
R
/
W
1
PDE:
2MB
page
X
D
Ignored Rsvd. Address of page table Ign. 0
I
g
n
A
P
C
D
P
W
T
U
/
S
R
/
W
1
PDE:
page
table
Ignored 0
PDE:
not
present
X
D
Ignored Rsvd. Address of 4KB page frame Ign. G
P
A
T
DA
P
C
D
P
W
T
U
/
S
R
/
W
1
PTE:
4KB
page
Ignored 0
PTE:
not
present
Figure 4-7. Formats of CR3 and Paging-Structure Entries with PAE Paging