Specifications
Intel
®
64 and IA-32 Architectures Software Developer’s Manual Documentation Changes 208
Documentation Changes
3. Updates to Chapter 4, Volume 3A
Change bars show changes to Chapter 4 of the Intel
®
64 and IA-32 Architectures Soft-
ware Developer’s Manual, Volume 3A: System Programming Guide, Part 1.
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Table 4-1 illustrates the key differences between the three paging modes.
Because they are used only if IA32_EFER.LME = 0, 32-bit paging and PAE paging is
used only in legacy protected mode. Because legacy protected mode cannot produce
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4.1.4 Enumeration of Paging Features by CPUID
Software can discover support for different paging features using the CPUID instruction:
• PSE: page-size extensions for 32-bit paging.
If CPUID.01H:EDX.PSE [bit 3] = 1, CR4.PSE may be set to 1, enabling support for 4-
MByte pages with 32-bit paging (see Section 4.3).
• PAE: physical-address extension.
If CPUID.01H:EDX.PAE [bit 6] = 1, CR4.PAE may be set to 1, enabling PAE paging
(this setting is also required for IA-32e paging).
• PGE: global-page support.
If CPUID.01H:EDX.PGE [bit 13] = 1, CR4.PGE may be set to 1, enabling the global-
page feature (see Section 4.10.1.4).
Table 4-1 Properties of Different Paging Modes
Paging
Mode
CR0.PG CR4.PAE
LME in
IA32_EFER
Linear-
Address
Width
Physical-
Address
Width
1
NOTES:
1. The physical-address width is always bounded by MAXPHYADDR; see Section 4.1.4.
Page
Size(s)
Supports
Execute-
Disable?
None 0 N/A N/A 32 32 N/A No
32-bit 1 0 0
2
2. The processor ensures that IA32_EFER.LME must be 0 if CR0.PG = 1 and CR4.PAE = 0.
32 Up to 40
3
3. 32-bit paging supports physical-address widths of more than 32 bits only for 4-MByte pages and
only if the PSE-36 mechanism is supported; see Section 4.1.4 and Section 4.3.
4-KByte
4-MByte
4
4. 4-MByte pages are used with 32-bit paging only if CR4.PSE = 1; see Section 4.3.
No
PAE 1 1 0 32 Up to 52
4-KByte
2-MByte
Yes
5
5. Execute-disable access rights are applied only if IA32_EFER.NXE = 1; see Section 4.6.
IA-32e 1 1 2 48 Up to 52
4-KByte
2-MByte
1-GByte
6
6. Not all processors that support IA-32e paging support 1-GByte pages; see Section 4.1.4.
Yes
5