Specifications

Intel
®
64 and IA-32 Architectures Software Developer’s Manual Documentation Changes 201
Documentation Changes
Instruction Operand Encoding
...
WAIT/FWAIT—Wait
Instruction Operand Encoding
Description
Causes the processor to check for and handle pending, unmasked, floating-point excep-
tions before proceeding. (FWAIT is an alternate mnemonic for WAIT.)
This instruction is useful for synchronizing exceptions in critical sections of code. Coding
a WAIT instruction after a floating-point instruction ensures that any unmasked floating-
point exceptions the instruction may raise are handled before the processor can modify
the instruction’s results. See the section titled “Floating-Point Exception Synchroniza-
tion” in Chapter 8 of the Intel
®
64 and IA-32 Architectures Software Developer’s Manual,
Volume 1, for more information on using the WAIT/FWAIT instruction.
This instruction’s operation is the same in non-64-bit modes and 64-bit mode.
...
WBINVD—Write Back and Invalidate Cache
Instruction Operand Encoding
...
Op/En Operand 1 Operand 2 Operand 3 Operand 4
A ModRM:r/m (r) NA NA NA
BNA NA NA NA
Opcode Instruction Op/
En
64-Bit
Mode
Compat/
Leg Mode
Description
9B WAIT A Valid Valid Check pending unmasked
floating-point exceptions.
9B FWAIT A Valid Valid Check pending unmasked
floating-point exceptions.
Op/En Operand 1 Operand 2 Operand 3 Operand 4
ANA NA NA NA
Opcode Instruction Op/
En
64-Bit
Mode
Compat/
Leg Mode
Description
0F 09 WBINVD A Valid Valid Write back and flush Internal
caches; initiate writing-back
and flushing of external
caches.
Op/En Operand 1 Operand 2 Operand 3 Operand 4
ANA NA NA NA