Specifications

Intel
®
64 and IA-32 Architectures Software Developer’s Manual Documentation Changes 200
Documentation Changes
UNPCKLPD—Unpack and Interleave Low Packed Double-Precision
Floating-Point Values
Instruction Operand Encoding
...
UNPCKLPS—Unpack and Interleave Low Packed Single-Precision Floating-
Point Values
Instruction Operand Encoding
...
VERR/VERW—Verify a Segment for Reading or Writing
Opcode Instruction Op/
En
64-Bit
Mode
Compat/
Leg Mode
Description
66 0F 14 /r UNPCKLPD xmm1,
xmm2/m128
A Valid Valid Unpacks and Interleaves
double-precision floating-
point values from low
quadwords of xmm1 and
xmm2/m128.
Op/En Operand 1 Operand 2 Operand 3 Operand 4
A ModRM:reg (r, w) ModRM:r/m (r) NA NA
Opcode Instruction Op/
En
64-Bit
Mode
Compat/
Leg Mode
Description
0F 14 /r UNPCKLPS xmm1,
xmm2/m128
A Valid Valid Unpacks and Interleaves
single-precision floating-
point values from low
quadwords of xmm1 and
xmm2/mem into xmm1.
Op/En Operand 1 Operand 2 Operand 3 Operand 4
A ModRM:reg (r, w) ModRM:r/m (r) NA NA
Opcode Instruction Op/
En
64-Bit
Mode
Compat/
Leg Mode
Description
0F 00 /4 VERR r/m16 A Valid Valid Set ZF=1 if segment
specified with r/m16 can be
read.
0F 00 /5 VERW r/m16 B Valid Valid Set ZF=1 if segment
specified with r/m16 can be
written.