Specifications

Intel
®
64 and IA-32 Architectures Software Developer’s Manual Documentation Changes 199
Documentation Changes
UD2—Undefined Instruction
Instruction Operand Encoding
...
UNPCKHPD—Unpack and Interleave High Packed Double-Precision
Floating-Point Values
Instruction Operand Encoding
...
UNPCKHPS—Unpack and Interleave High Packed Single-Precision
Floating-Point Values
Instruction Operand Encoding
...
Opcode Instruction Op/
En
64-Bit
Mode
Compat/
Leg Mode
Description
0F 0B UD2 A Valid Valid Raise invalid opcode
exception.
Op/En Operand 1 Operand 2 Operand 3 Operand 4
ANA NA NA NA
Opcode Instruction Op/
En
64-Bit
Mode
Compat/
Leg Mode
Description
66 0F 15 /r UNPCKHPD xmm1,
xmm2/m128
A Valid Valid Unpacks and Interleaves
double-precision floating-
point values from high
quadwords of xmm1 and
xmm2/m128.
Op/En Operand 1 Operand 2 Operand 3 Operand 4
A ModRM:reg (r, w) ModRM:r/m (r) NA NA
Opcode Instruction Op/
En
64-Bit
Mode
Compat/
Leg Mode
Description
0F 15 /r UNPCKHPS xmm1,
xmm2/m128
A Valid Valid Unpacks and Interleaves
single-precision floating-
point values from high
quadwords of xmm1 and
xmm2/mem into xmm1.
Op/En Operand 1 Operand 2 Operand 3 Operand 4
A ModRM:reg (r, w) ModRM:r/m (r) NA NA