Specifications

Intel
®
64 and IA-32 Architectures Software Developer’s Manual Documentation Changes 198
Documentation Changes
Instruction Operand Encoding
...
UCOMISD—Unordered Compare Scalar Double-Precision Floating-Point
Values and Set EFLAGS
Instruction Operand Encoding
...
UCOMISS—Unordered Compare Scalar Single-Precision Floating-Point
Values and Set EFLAGS
Instruction Operand Encoding
...
Op/En Operand 1 Operand 2 Operand 3 Operand 4
A AL/AX/EAX/RAX imm8/16/32 NA NA
B ModRM:r/m (r) imm8/16/32 NA NA
C ModRM:r/m (r) ModRM:reg (r) NA NA
Opcode Instruction Op/
En
64-Bit
Mode
Compat/
Leg Mode
Description
66 0F 2E /r UCOMISD xmm1,
xmm2/m64
A Valid Valid Compares (unordered) the
low double-precision
floating-point values in
xmm1 and xmm2/m64 and
set the EFLAGS accordingly.
Op/En Operand 1 Operand 2 Operand 3 Operand 4
A ModRM:reg (r) ModRM:r/m (r) NA NA
Opcode Instruction Op/
En
64-Bit
Mode
Compat/
Leg Mode
Description
0F 2E /r UCOMISS xmm1,
xmm2/m32
A Valid Valid Compare lower single-
precision floating-point
value in xmm1 register with
lower single-precision
floating-point value in
xmm2/mem and set the
status flags accordingly.
Op/En Operand 1 Operand 2 Operand 3 Operand 4
A ModRM:reg (r) ModRM:r/m (r) NA NA